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src/cmd/vendor/golang.org/x/arch/x86/x86asm/plan9x.go
} return fmt.Sprintf("%#x", addr) case Imm: if s, base := symname(uint64(a)); s != "" { suffix := "" if uint64(a) != base { suffix = fmt.Sprintf("%+d", uint64(a)-base) } return fmt.Sprintf("$%s%s(SB)", s, suffix) } if inst.Mode == 32 { return fmt.Sprintf("$%#x", uint32(a)) } if Imm(int32(a)) == a { return fmt.Sprintf("$%#x", int64(a)) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 12 20:38:21 UTC 2023 - 7.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/a.out.go
REG_F15 REG_F16 REG_F17 REG_F18 REG_F19 REG_F20 REG_F21 REG_F22 REG_F23 REG_F24 REG_F25 REG_F26 REG_F27 REG_F28 REG_F29 REG_F30 REG_F31 // SIMD REG_V0 REG_V1 REG_V2 REG_V3 REG_V4 REG_V5 REG_V6 REG_V7 REG_V8 REG_V9 REG_V10 REG_V11 REG_V12 REG_V13 REG_V14 REG_V15 REG_V16 REG_V17
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 18.1K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/internal/poly1305/sum_s390x.s
// powers of r that we need from the original equation. // // Notation: // // h - accumulator // r - key // m - message // // [a, b] - SIMD register holding two 64-bit values // [a, b, c, d] - SIMD register holding four 32-bit values // xᵢ[n] - limb n of variable x with bit width i // // Limbs are expressed in little endian order, so for 26-bit
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 17.5K bytes - Viewed (0) -
doc/asm.html
</li> <li> <code>R0.UXTB</code> <br> <code>R0.UXTB<<imm</code>: <code>UXTB</code>: extract an 8-bit value from the low-order bits of <code>R0</code> and zero-extend it to the size of <code>R0</code>. <code>R0.UXTB<<imm</code>: left shift the result of <code>R0.UXTB</code> by <code>imm</code> bits. The <code>imm</code> value can be 0, 1, 2, 3, or 4.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (1) -
src/internal/cpu/cpu.go
HasSHA2 bool HasSHA512 bool HasCRC32 bool HasATOMICS bool HasCPUID bool IsNeoverse bool _ CacheLinePad } var MIPS64X struct { _ CacheLinePad HasMSA bool // MIPS SIMD architecture _ CacheLinePad } // For ppc64(le), it is safe to check only for ISA level starting on ISA v3.00, // since there are no optional categories. There are some exceptions that also
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 7.1K bytes - Viewed (0) -
pilot/pkg/networking/core/sidecar_simulation_test.go
Configs: istio, KubernetesObjects: kubeo, }) sim := simulation.NewSimulation(t, s, s.SetupProxy(tt.proxy)) xdstest.ValidateListeners(t, sim.Listeners) xdstest.ValidateRouteConfigurations(t, sim.Routes) r := xdstest.ExtractRouteConfigurations(sim.Routes) vh := r[tt.routeName] exp := tt.expected
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Thu Jun 13 01:56:28 UTC 2024 - 84.7K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9_gtables.go
o1 |= uint32((p.RestArgs[0].Addr.Reg>>5)&0x1) << 3 // CX o1 |= uint32(p.RestArgs[0].Addr.Reg&0x1f) << 6 // C o0 |= uint32(p.RestArgs[1].Addr.Offset&0xff) << 0 // IMM out[1] = o1 out[0] = o0 } // xxgenpcvwm XT,VRB,IMM func type_xxgenpcvwm(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) { o0 := GenOpcodes[p.As-AXXSETACCZ] o0 |= uint32((p.To.Reg>>5)&0x1) << 0 // TX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 16 20:18:50 UTC 2022 - 42.6K bytes - Viewed (0) -
docs/de/docs/features.md
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Sat Mar 30 19:43:43 UTC 2024 - 10.8K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm64.go
a.Index = num case "D": if !isIndex { return nil } a.Reg = arm64.REG_ELEM + (reg & 31) + ((arm64.ARNG_D & 15) << 5) a.Index = num default: return errors.New("unsupported simd register extension type: " + ext) } } else { return errors.New("invalid register and extension combination") } return nil }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 29 09:04:58 UTC 2022 - 10.4K bytes - Viewed (0) -
docs/en/data/github_sponsors.yml
avatarUrl: https://avatars.githubusercontent.com/u/3631417?u=7c8f743f1ae325dfadea7c62bbf1abd6a824fc55&v=4 url: https://github.com/kennywakeland - login: simw avatarUrl: https://avatars.githubusercontent.com/u/6322526?v=4 url: https://github.com/simw - login: koconder avatarUrl: https://avatars.githubusercontent.com/u/25068?u=582657b23622aaa3dfe68bd028a780f272f456fa&v=4 url: https://github.com/koconder
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Mon Jun 03 01:09:53 UTC 2024 - 27K bytes - Viewed (0)