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Results 121 - 130 of 214 for add32a (0.12 sec)
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src/internal/runtime/atomic/atomic_mipsx.go
//go:noescape func Or8(ptr *uint8, val uint8) //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32 //go:noescape func Or32(ptr *uint32, val uint32) uint32 //go:noescape func Anduintptr(ptr *uintptr, val uintptr) uintptr //go:noescape
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 20:08:37 UTC 2024 - 3.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/quantized_function_library.mlir
%cast = "tf.Cast"(%accumulation) {Truncate = false} : (tensor<*xi32>) -> tensor<*xf32> %mul = "tf.Mul"(%cast, %rescale_factor) : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> %add = "tf.AddV2"(%mul, %float_out_zp) : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> func.return %add : tensor<*xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Jan 08 01:16:10 UTC 2024 - 30.6K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_mips64x.go
func Or8(ptr *uint8, val uint8) // NOTE: Do not add atomicxor8 (XOR is not idempotent). //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32 //go:noescape func Or32(ptr *uint32, val uint32) uint32 //go:noescape func And64(ptr *uint64, val uint64) uint64 //go:noescape func Or64(ptr *uint64, val uint64) uint64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 21:29:34 UTC 2024 - 2.1K bytes - Viewed (0) -
cmd/net_test.go
} } } } func TestSameLocalAddrs(t *testing.T) { testCases := []struct { addr1 string addr2 string sameAddr bool expectedErr error }{ {"", "", false, errors.New("unable to process empty address")}, {":9000", ":9000", true, nil}, {"localhost:9000", ":9000", true, nil},
Registered: Sun Jun 16 00:44:34 UTC 2024 - Last Modified: Fri Apr 19 08:43:09 UTC 2024 - 9.3K bytes - Viewed (0) -
tensorflow/c/while_loop_test.cc
TF_Operation* one = ScalarConst(1, params_->body_graph, s_); ASSERT_EQ(TF_OK, TF_GetCode(s_)) << TF_Message(s_); TF_Operation* add2 = Add(add1, one, params_->body_graph, s_, "add2"); ASSERT_EQ(TF_OK, TF_GetCode(s_)) << TF_Message(s_); params_->body_outputs[0] = {add2, 0}; params_->body_outputs[1] = params_->body_inputs[1]; // Finalize while loop ExpectOK();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 11 06:05:56 UTC 2024 - 15.3K bytes - Viewed (0) -
src/math/bits/bits.go
func Add(x, y, carry uint) (sum, carryOut uint) { if UintSize == 32 { s32, c32 := Add32(uint32(x), uint32(y), uint32(carry)) return uint(s32), uint(c32) } s64, c64 := Add64(uint64(x), uint64(y), uint64(carry)) return uint(s64), uint(c64) } // Add32 returns the sum with carry of x, y and carry: sum = x + y + carry. // The carry input must be 0 or 1; otherwise the behavior is undefined.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 11:59:09 UTC 2023 - 17.9K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_amd64.s
MOVL val+8(FP), CX casloop: MOVL CX, DX MOVL (BX), AX ORL AX, DX LOCK CMPXCHGL DX, (BX) JNZ casloop MOVL AX, ret+16(FP) RET // func And32(addr *uint32, v uint32) old uint32 TEXT ·And32(SB), NOSPLIT, $0-20 MOVQ ptr+0(FP), BX MOVL val+8(FP), CX casloop: MOVL CX, DX MOVL (BX), AX ANDL AX, DX LOCK CMPXCHGL DX, (BX) JNZ casloop MOVL AX, ret+16(FP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 5.2K bytes - Viewed (0) -
tensorflow/c/experimental/gradients/math_grad_test.cc
ASSERT_EQ(errors::OK, status_.code()) << status_.message(); y.reset(y_raw); } // TODO(srbs): Rename ops::Add to ops::AddV2 and AddRegister to // AddV2Registerer. status_ = registry_.Register("AddV2", AddRegisterer); ASSERT_EQ(errors::OK, status_.code()) << status_.message(); ASSERT_NO_FATAL_FAILURE(CompareNumericalAndAutodiffGradients(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 13 17:32:14 UTC 2023 - 16.3K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_s390x.s
MOVW val+8(FP), R5 MOVW (R4), R3 repeat: OR R5, R3, R6 CS R3, R6, (R4) // if R3==(R4) then (R4)=R6 else R3=(R4) BNE repeat MOVW R3, ret+16(FP) RET // func And32(addr *uint32, v uint32) old uint32 TEXT ·And32(SB), NOSPLIT, $0-20 MOVD ptr+0(FP), R4 MOVW val+8(FP), R5 MOVW (R4), R3 repeat: AND R5, R3, R6 CS R3, R6, (R4) // if R3==(R4) then (R4)=R6 else R3=(R4) BNE repeat
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 7.1K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_s390x.go
// NOTE: Do not add atomicxor8 (XOR is not idempotent). //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32 //go:noescape func Or32(ptr *uint32, val uint32) uint32 //go:noescape func And64(ptr *uint64, val uint64) uint64 //go:noescape
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 2.5K bytes - Viewed (0)