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Results 51 - 56 of 56 for 3x42 (0.06 sec)

  1. src/cmd/cgo/internal/test/test.go

    // we shouldn't name the function abs, as gcc might use
    // the builtin one.
    int vabs(int x) { return __absvsi2(x); }
    #endif
    
    
    // issue 3729
    // access errno from void C function
    const char _expA = 0x42;
    const float _expB = 3.14159;
    const short _expC = 0x55aa;
    const int _expD = 0xdeadbeef;
    
    #ifdef WIN32
    void g(void) {}
    void g2(int x, char a, float b, short c, int d) {}
    #else
    
    void g(void) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 15:50:06 UTC 2024
    - 48.5K bytes
    - Viewed (0)
  2. docs/en/docs/release-notes.md

    * 🌐 Update Chinese translation for `docs/zh/docs/tutorial/security/get-current-user.md`. PR [#3842](https://github.com/tiangolo/fastapi/pull/3842) by [@jaystone776](https://github.com/jaystone776).
    Registered: Mon Jun 17 08:32:26 UTC 2024
    - Last Modified: Fri Jun 14 15:07:37 UTC 2024
    - 395.4K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/mips/asm0.go

    		}
    		o1 = OP_RRR(a, REGZERO, p.From.Reg, REGZERO)
    
    	case 22: /* mul r1,r2 [r3]*/
    		if p.To.Reg != obj.REG_NONE {
    			r := p.Reg
    			if r == obj.REG_NONE {
    				r = p.To.Reg
    			}
    			a := SP(3, 4) | 2 /* mul */
    			o1 = OP_RRR(a, p.From.Reg, r, p.To.Reg)
    		} else {
    			o1 = OP_RRR(c.oprrr(p.As), p.From.Reg, p.Reg, REGZERO)
    		}
    
    	case 23: /* add $lcon,r1,r2 ==> lu+or+add */
    		v := c.regoff(&p.From)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 17:46:09 UTC 2024
    - 53.6K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/loong64/asm.go

    		return 0x3b << 15 // mul.d
    	case AMULHV:
    		return 0x3c << 15 // mulh.d
    	case AMULHVU:
    		return 0x3d << 15 // mulhu.d
    	case ADIV:
    		return 0x40 << 15 // div.w
    	case ADIVU:
    		return 0x42 << 15 // div.wu
    	case ADIVV:
    		return 0x44 << 15 // div.d
    	case ADIVVU:
    		return 0x46 << 15 // div.du
    	case AREM:
    		return 0x41 << 15 // mod.w
    	case AREMU:
    		return 0x43 << 15 // mod.wu
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 61.8K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/fuse-tftext.mlir

      %334:2 = "tf.RaggedRange"(%333, %330, %13) {T = i64, Tsplits = i64, device = ""} : (tensor<?xi64>, tensor<?xi64>, tensor<i64>) -> (tensor<?xi64>, tensor<?xi64>)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 460.3K bytes
    - Viewed (0)
  6. src/internal/trace/testdata/tests/go122-gc-stress.test

    HeapAlloc dt=47 heapalloc_value=191372736
    GCMarkAssistBegin dt=11 stack=3
    GoBlock dt=1789 reason_string=13 stack=11
    GoUnblock dt=19 g=22 g_seq=3 stack=0
    GoStart dt=7 g=22 g_seq=4
    GoLabel dt=1 label_string=2
    GoBlock dt=3342 reason_string=15 stack=5
    GoUnblock dt=2752 g=71 g_seq=1 stack=0
    GoStart dt=7 g=71 g_seq=2
    GoLabel dt=1 label_string=4
    GoBlock dt=269 reason_string=15 stack=5
    GoStart dt=4308 g=111 g_seq=3
    GCMarkAssistEnd dt=7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 18:48:18 UTC 2024
    - 139.1K bytes
    - Viewed (0)
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