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Results 21 - 30 of 225 for SmallVector (0.19 sec)
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tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_rewrite_pass.cc
void AssignDevicesToReplicate( tf_device::ReplicateOp replicate, llvm::ArrayRef<llvm::SmallVector<tensorflow::TPUDeviceAndHost, 8>> tpu_devices, OpBuilder* builder) { if (!replicate) return; const int num_replicas = tpu_devices.size(); const int num_cores_per_replica = tpu_devices.front().size(); llvm::SmallVector<NamedAttribute, 8> device_attrs; for (int core = 0; core < num_cores_per_replica; ++core) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 21:25:12 UTC 2024 - 29.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/xla_validate_inputs.cc
void runOnOperation() override; }; LogicalResult HasNoNestedEntryFunctions( const llvm::SmallVector<func::FuncOp> &entry_funcs, SymbolTable &symtab) { auto calls_entry_functions = [&](SymbolUserOpInterface op) { llvm::SmallVector<func::FuncOp> callees; if (GetCallees(op, symtab, callees).failed()) { return false; } for (auto &callee : callees) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 19:29:14 UTC 2024 - 3.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc
// every host, a failure will be returned. absl::StatusOr<llvm::SmallVector<llvm::SmallVector<ParsedDevice, 8>, 8>> GetTPUDevices(ParsedDevices devices, llvm::ArrayRef<ParsedDevice> system_devices) { llvm::SmallVector<llvm::SmallVector<ParsedDevice, 8>, 8> tpu_devices; tpu_devices.reserve(system_devices.size());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Jun 10 20:10:40 UTC 2024 - 32.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
} return mlir::success(); } llvm::SmallVector<llvm::SmallVector<int64_t, 4>, 4> GetMetadataArgumentMapping( const tpu::TPUCompileMetadataProto& metadata) { llvm::SmallVector<llvm::SmallVector<int64_t, 4>, 4> input_mappings( metadata.num_cores_per_replica(), llvm::SmallVector<int64_t, 4>()); if (metadata.num_cores_per_replica() == 1) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 21:28:13 UTC 2024 - 34K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/utils/utils.h
SmallVector<int64_t, 8> perm_values; for (const auto& dim : perm_values_attr.getValues<APInt>()) perm_values.push_back(dim.getSExtValue()); // This should never happen unless the input graph is malformed. if (input_shape.size() != perm_values.size()) { return false; } SmallVector<int, 8> old_major_index_ordering; SmallVector<int, 8> new_major_index_ordering;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 00:40:15 UTC 2024 - 11.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
Value &window_strides, Value &lhs_dilation, Value &rhs_dilation, Value &feature_group_count, int num_dims) { SmallVector<int32_t> lhs_dilation_values(num_dims - 2, 1); SmallVector<int32_t> stride_values, rhs_dilation_values; for (int64_t i : llvm::seq<int64_t>(1, num_dims - 1)) { stride_values.push_back(mlir::cast<IntegerAttr>(strides[i]).getInt());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 47.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc
return failure(); } SmallVector<int32_t, 4> begin, end, strides; SmallVector<int32_t, 4> padded_begin, padded_end, padded_strides; int num_input_dims = ranked_input_type.getRank(); SmallVector<int32_t, 4> padding_begin(num_input_dims, 0); auto input_shape = ranked_input_type.getShape(); SmallVector<int32_t, 4> padding_end(input_shape.begin(), input_shape.end());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 28 21:49:50 UTC 2024 - 64.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h
// pass the filter (returning true) will be included. const llvm::SmallVector<Operation*, 4>& DirectControlPredecessors( Operation* op) const; llvm::SmallVector<Operation*, 4> DirectControlPredecessors( Operation* op, llvm::function_ref<bool(Operation*)> filter) const; // pass the filter (returning true) will be included. const llvm::SmallVector<Operation*, 4>& DirectControlSuccessors( Operation* op) const;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 15 09:04:13 UTC 2024 - 14.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.cc
mlir::IntegerAttr op_key; mlir::IntegerAttr cost; mlir::StringAttr device; mlir::StringAttr op_name; mlir::SymbolRefAttr f; llvm::SmallVector<mlir::OpAsmParser::UnresolvedOperand, 4> in_chains; llvm::SmallVector<mlir::OpAsmParser::UnresolvedOperand, 4> operands; mlir::NamedAttrList op_attrs; mlir::NamedAttrList op_func_attrs; auto loc = parser.getNameLoc(); if (options.has_chain &&
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 5.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util_test.cc
parsed_devices->push_back(parsed_name); } return true; } using DeviceNames = llvm::SmallVector<std::string, 8>; struct ParameterizedDeviceSetTest : ::testing::TestWithParam<std::tuple<DeviceNames, std::string>> {}; TEST_P(ParameterizedDeviceSetTest, BadDeviceSet) { llvm::SmallVector<Device, 8> devices; ASSERT_TRUE(DeviceNamesToParsedNames(std::get<0>(GetParam()), &devices)); std::string topology_attr;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Apr 26 09:37:10 UTC 2024 - 46.8K bytes - Viewed (0)