bool TFIntListIs1XYZ1(Operation *op, StringRef name, IntegerAttr *x,
                      IntegerAttr *y, IntegerAttr *z) {
  auto attr = op->getAttrOfType<ArrayAttr>(name);
  if (!attr) return false;

  auto elements = attr.getValue();
  if (elements.size() != 5 ||
      std::any_of(elements.begin(), elements.end(),
                  [](Attribute e) { return !mlir::isa<IntegerAttr>(e); }))
    return false;

#include "tensorflow/compiler/mlir/python/mlir_wrapper/mlir_wrapper.h"

void init_attrs(py::module& m) {
  py::class_<mlir::Attribute>(m, "Attribute");
  py::class_<mlir::IntegerAttr, mlir::Attribute>(m, "IntegerAttr")
      .def("get",
           py::overload_cast<mlir::Type, int64_t>(&mlir::IntegerAttr::get));

// and writes X, Y as 32-bit integer attribute to `x`, `y`, z.
bool TFIntListIs1XYZ1(Operation *op, StringRef name, IntegerAttr *x,
                      IntegerAttr *y, IntegerAttr *z);

// Returns true if every element of the attribute is 1. All elements of `attr`
// must be `IntegerAttr`.
bool TFIntListIsAllOnes(Attribute attr);

// Returns true iff the given value is a float32 tensor.
// is "DT_FLOAT".

    // attribute modulo the number of TPU cores in the system.
    for (auto op : require_device_ordinal_ops) {
      if (op->getAttrOfType<IntegerAttr>(kDeviceOrdinalAttr).getInt() == -1) {
        OpBuilder builder(op);
        int device_ordinal =
            op->getAttrOfType<IntegerAttr>(kReplicaIdAttr).getInt() %
            device_num;
        op->setAttr(kDeviceOrdinalAttr,
                    builder.getI64IntegerAttr(device_ordinal));
      }

 public:
  void runOnOperation() override;
};

LogicalResult SetOnceModuleAttribute(StringRef attr_name,
                                     IntegerAttr attr_value, Operation* op,
                                     ModuleOp& module) {
  const auto ex_attr_value = module->getAttrOfType<IntegerAttr>(attr_name);
  if (ex_attr_value == nullptr) {
    module->setAttr(attr_name, attr_value);
    return success();
  }

  p << "(" << op.getInCh() << ") key("
    << op->getAttrOfType<mlir::IntegerAttr>("op_key").getInt() << ") device("
    << op->getAttr("device") << ") " << op->getAttr("op_name") << "()";

  fallback_common::PrintExecuteOpCommon(p, op);
  fallback_common::PrintExecuteOpFuncAttribute(p, op);

  p << " num_args(" << op->getAttrOfType<mlir::IntegerAttr>("num_args").getInt()
    << ')';
}

  if (!version_attr) return mlir::failure();

  auto producer =
      mlir::dyn_cast_or_null<mlir::IntegerAttr>(version_attr.get("producer"));
  if (!producer) return mlir::failure();
  versions->set_producer(producer.getInt());

  auto min_consumer = mlir::dyn_cast_or_null<mlir::IntegerAttr>(
      version_attr.get("min_consumer"));
  if (min_consumer) versions->set_min_consumer(min_consumer.getInt());

  } else {
    return mlir::dyn_cast_or_null<FloatAttr>(attr);
  }
}

IntegerAttr ExtractSingleElementAsInteger(ElementsAttr attr) {
  if (attr.getShapedType().getNumElements() != 1 ||
      !attr.getShapedType().getElementType().isSignlessInteger()) {
    return {};
  }
  return attr.getSplatValue<IntegerAttr>();
}

}  // namespace TFL

  for (int i : llvm::seq<int>(1, num_dims - 1)) {
    Value input_size_i = GetDimValue(builder, loc, input_shape_value, i);
    const int stride_i = mlir::cast<IntegerAttr>(strides[i]).getInt();
    const int dilation_i = mlir::cast<IntegerAttr>(dilations[i]).getInt();
    const int filter_i = filter_shape.getDimSize(i - 1);
    Value pad_i_low, pad_i_high;
    GetSamePaddingValues(builder, loc, input_size_i, filter_i, dilation_i,

                          NamedAttribute pair) {
  const char* key = pair.getName().data();
  const auto attr = pair.getValue();

  if (mlir::isa<::mlir::IntegerAttr>(attr)) {
    fbb->Int(key, mlir::dyn_cast<mlir::IntegerAttr>(attr).getInt());
    return success();
  }

  if (mlir::isa<::mlir::FloatAttr>(attr)) {
    fbb->Double(key, mlir::dyn_cast<mlir::FloatAttr>(attr).getValueAsDouble());