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Results 11 - 19 of 19 for simm (0.07 sec)

  1. src/cmd/internal/obj/x86/asm6.go

    				ab.Put1(byte(p.From.Offset))
    
    			case Zevex_i_rm_k_r:
    				imm, from, kmask, to := unpackOps4(p)
    				ab.evex = newEVEXBits(z, &o.op)
    				ab.asmevex(ctxt, p, from, nil, to, kmask)
    				ab.asmand(ctxt, cursym, p, from, to)
    				ab.Put1(byte(imm.Offset))
    
    			case Zevex_i_rm_v_r:
    				imm, from, from3, to := unpackOps4(p)
    				ab.evex = newEVEXBits(z, &o.op)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 146.9K bytes
    - Viewed (0)
  2. internal/s3select/select.go

    		}
    		buf.WriteString(s3Select.Output.CSVArgs.RecordDelimiter)
    
    		return nil
    	case jsonFormat:
    		err := record.WriteJSON(buf)
    		if err != nil {
    			return err
    		}
    		// Trim trailing newline from non-simd output
    		if buf.Bytes()[buf.Len()-1] == '\n' {
    			buf.Truncate(buf.Len() - 1)
    		}
    		buf.WriteString(s3Select.Output.JSONArgs.RecordDelimiter)
    
    		return nil
    	}
    
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Fri May 24 23:05:23 UTC 2024
    - 21K bytes
    - Viewed (0)
  3. go.sum

    github.com/minio/mc v0.0.0-20240612143403-e7c9a733c680/go.mod h1:21/cb+wUd+lLRsdX7ACqyO8DzPNSpXftp1bOkQlIbh8=
    github.com/minio/md5-simd v1.1.2 h1:Gdi1DZK69+ZVMoNHRXJyNcxrMA4dSxoYHZSQbirFg34=
    github.com/minio/md5-simd v1.1.2/go.mod h1:MzdKDxYpY2BT9XQFocsiZf/NKVtR7nkE4RoEpN+20RM=
    github.com/minio/minio-go/v6 v6.0.46/go.mod h1:qD0lajrGW49lKZLtXKtCB4X/qkMf0a5tBvN2PaZg7Gg=
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Thu Jun 13 22:53:53 UTC 2024
    - 85.8K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/link.go

    //		Encoding:
    //			type = TYPE_REG
    //			reg = REG_[US]XT[BHWX] + register + shift amount
    //			offset = ((reg&31) << 16) | (exttype << 13) | (amount<<10)
    //
    //	reg.<T>
    //		Register arrangement for ARM64 SIMD register
    //		e.g.: V1.S4, V2.S2, V7.D2, V2.H4, V6.B16
    //		Encoding:
    //			type = TYPE_REG
    //			reg = REG_ARNG + register + arrangement
    //
    //	reg.<T>[index]
    //		Register element for ARM64
    //		Encoding:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 19:57:43 UTC 2024
    - 33.1K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/arm64/asm7.go

    			esize = 32
    		case ARNG_2D:
    			imax = 127
    			esize = 64
    		}
    
    		imm := 0
    		switch p.As {
    		case AVUSHR, AVSRI, AVUSRA:
    			imm = esize*2 - shift
    			if imm < esize || imm > imax {
    				c.ctxt.Diag("shift out of range: %v", p)
    			}
    		case AVSHL, AVSLI:
    			imm = esize + shift
    			if imm > imax {
    				c.ctxt.Diag("shift out of range: %v", p)
    			}
    		default:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc

            op, result_type, op.getX(), indices, updates);
        return success();
      }
    };
    
    // Approximates lgamma using Lanczos' approximation from
    // "A Precision Approximation of the Gamma Function". SIAM Journal on Numerical
    // Analysis series B. Vol. 1:
    // lgamma(z + 1) = (log(2) + log(pi)) / 2 + (z + 1/2) * log(t(z)) - t(z) + A(z)
    // t(z) = z + kLanczosGamma + 1/2
    // A(z) = kBaseLanczosCoeff
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 74.9K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc

    //
    // TF unsorted segment reduction op peforms the following calculation:
    //
    // Assume segment ids' shape is [SI0, SI1, ..., SIm] and data's  shape is
    // [D0, D1, ..., Dn]. Note that segment ids' shape must be a prefix of data's
    // shape, so we can have data's shape represented as [SI0, SI1, ..., SIm,
    // Dm+1, ..., Dn]. Then
    //   output[segment_ids[SI_i0, SI_i1, ..., SI_im], D_im+1, ..., D_in] =
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 20:00:43 UTC 2024
    - 291.8K bytes
    - Viewed (0)
  8. RELEASE.md

    peeyush18, Peng Yu, Pierre, preciousdp11, qjivy, Raingo, raoqiyu, ribx, Richard
    S. Imaoka, Rishabh Patel, Robert Walecki, Rockford Wei, Ryan Kung, Sahil Dua,
    Sandip Giri, Sayed Hadi Hashemi, sgt101, Shitian Ni, Shuolongbj, Siim PõDer,
    Simon Perkins, sj6077, SOLARIS, Spotlight0xff, Steffen Eberbach, Stephen Fox,
    superryanguo, Sven Mayer, Tapan Prakash, Tiago Morais Morgado, Till Hoffmann, Tj
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 730.3K bytes
    - Viewed (0)
  9. CREDITS

    <https://www.gnu.org/licenses/>.
    
    ================================================================
    
    github.com/minio/md5-simd
    https://github.com/minio/md5-simd
    ----------------------------------------------------------------
    
                                     Apache License
                               Version 2.0, January 2004
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Thu Jun 13 15:34:20 UTC 2024
    - 1.7M bytes
    - Viewed (0)
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