// Disallow X3 in shared mode, as this will likely be used as the
		// GP register, which could result in problems in non-Go code,
		// including signal handlers.
		if shared && i == riscv.REG_GP {
			continue
		}
		if i == riscv.REG_TP || i == riscv.REG_G {
			continue
		}
		name := fmt.Sprintf("X%d", i-riscv.REG_X0)
		register[name] = int16(i)
	}

    const absl::flat_hash_map<absl::string_view, int>& histogram) {
  for (const auto& pair : histogram) {
    XlaAutoClusteringSummary::OpAndCount* new_entry = result->Add();
    new_entry->set_op(std::string(pair.first));
    new_entry->set_count(pair.second);
  }

  absl::c_sort(*result, [](const XlaAutoClusteringSummary::OpAndCount& a,
                           const XlaAutoClusteringSummary::OpAndCount& b) {

Status ConvertAttribute(const mlir::BoolAttr& attr, AttrValue* value) {
  value->set_b(attr.getValue());
  return absl::OkStatus();
}

Status ConvertAttribute(const mlir::IntegerAttr& attr, AttrValue* value) {
  value->set_i(attr.getInt());
  return absl::OkStatus();
}

Status ConvertAttribute(const mlir::FloatAttr& attr, AttrValue* value) {
  value->set_f(attr.getValueAsDouble());
  return absl::OkStatus();
}

	REG_F31

	// This marks the end of the register numbering.
	REG_END

	// General registers reassigned to ABI names.
	REG_ZERO = REG_X0
	REG_RA   = REG_X1 // aka REG_LR
	REG_SP   = REG_X2
	REG_GP   = REG_X3 // aka REG_SB
	REG_TP   = REG_X4
	REG_T0   = REG_X5
	REG_T1   = REG_X6
	REG_T2   = REG_X7
	REG_S0   = REG_X8
	REG_S1   = REG_X9
	REG_A0   = REG_X10
	REG_A1   = REG_X11
	REG_A2   = REG_X12

  const int num_inputs = input_shapes->num_items;
  NodeDef node_def;
  tensorflow::ImmediateExecutionOperation* op = tensorflow::unwrap(tfe_op);
  node_def.set_name(op->Name());
  node_def.set_op(op->Name());
  for (int i = 0; i < num_inputs; ++i) {
    node_def.add_input("dummy_input");
  }
  OperationFromInterface(op)->Attrs().FillAttrValueMap(node_def.mutable_attr());

	{1135, "", ""},
	{1136, "EDC8136I", "File is not a STREAM."},
	{1137, "EDC8137I", "STREAMS ioctl() timeout."},
	{1138, "EDC8138I", "No STREAMS resources."},
	{1139, "EDC8139I", "The message identified by set_id and msg_id is not in the message catalog."},
	{1140, "EDC8140I", "Bad message."},
	{1141, "EDC8141I", "Identifier removed."},
	{1142, "", ""},
	{1143, "", ""},
	{1144, "EDC8144I", "The link has been severed."},

}

int FindReturnIndex(Value val) {
  const int not_found = -1;
  for (auto user : val.getUsers()) {
    if (auto ret_op = llvm::dyn_cast<func::ReturnOp>(user)) {
      for (auto index = 0; index < ret_op->getNumOperands(); ++index) {
        if (val == ret_op->getOperand(index)) {
          return index;
        }
      }
    }
    if (auto ident_op = llvm::dyn_cast<TF::IdentityOp>(user)) {

    bool reuse_existing_functions, FunctionLibraryDefinition* library) {
  // name_in is copied here because name may be modified below if
  // rewrite_subgraph_fn is true.
  string name = name_in;
  call_node_def_.set_op(name);
  call_node_def_.set_name(name);
  call_node_def_.set_device(device_);

  if (rewrite_subgraph_fn) {
    std::vector<OutputTensor> arg_source_tensors(args_by_src_.size());

   * The HTTP <a
   * href="https://privacycg.github.io/gpc-spec/#the-sec-gpc-header-field-for-http-requests">{@code
   * Sec-GPC}</a> header field name.
   *
   * @since 33.2.0
   */
  public static final String SEC_GPC = "Sec-GPC";

  /**
   * The HTTP <a
   * href="https://wicg.github.io/turtledove/#handling-direct-from-seller-signals">{@code
   * Ad-Auction-Signals}</a> header field name.
   *
   * @since 33.0.0
   */

   * The HTTP <a
   * href="https://privacycg.github.io/gpc-spec/#the-sec-gpc-header-field-for-http-requests">{@code
   * Sec-GPC}</a> header field name.
   *
   * @since 33.2.0
   */
  public static final String SEC_GPC = "Sec-GPC";

  /**
   * The HTTP <a
   * href="https://wicg.github.io/turtledove/#handling-direct-from-seller-signals">{@code
   * Ad-Auction-Signals}</a> header field name.
   *
   * @since 33.0.0
   */