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Results 21 - 30 of 32 for rldic (0.07 sec)
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src/vendor/golang.org/x/crypto/internal/poly1305/sum_ppc64le.s
MULLD h2, r1, t3; \ ADDZE t4, h0; \ MULHDU r1, h1, t5; \ MULLD r1, h1, t4; \ ADDC t4, t2, t2; \ ADDE t5, t3, t3; \ ADDC h0, t2, t2; \ MOVD $-4, t4; \ ADDZE t3; \ RLDICL $0, t2, $62, h2; \ AND t2, t4, h0; \ ADDC t0, h0, h0; \ ADDE t3, t1, h1; \ SLD $62, t3, t4; \ SRD $2, t2; \ ADDZE h2; \ OR t4, t2, t2; \ SRD $2, t3; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Mar 09 00:09:40 UTC 2024 - 3.2K bytes - Viewed (0) -
src/runtime/sys_linux_ppc64x.s
MOVD m_curg(R21), R6 CMP g, R6 BNE noswitch MOVD m_g0(R21), R7 MOVD (g_sched+gobuf_sp)(R7), R1 // Set SP to g0 stack noswitch: SUB $16, R1 // Space for results RLDICR $0, R1, $59, R1 // Align for C code MOVD R12, CTR MOVD R1, R4 // Store g on gsignal's stack, so if we receive a signal // during VDSO code we can find the g.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 18.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/internal/bytealg/index_ppc64x.s
loadge16: ANDCC $15, R5, R9 // Find byte offset of sep ADD R9, R6, R10 // Add sep len CMP R10, $16 // Check if sep len+offset > 16 BGT sepcross16 // Sep crosses 16 byte boundary RLDICR $0, R5, $59, R8 // Adjust addr to 16 byte container VLOADSWAP(R8, R0, V0, V0) // Load 16 bytes @R8 into V0 SLD $3, R9 // Set up shift count for VSLO MTVSRD R9, V8 // Set up shift count for VSLO
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 31.6K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_ppc64x.s
BLT cmp16 // Jump to the small string case if it's <32 bytes. CMP R4,$64,CR1 MOVD $16,R11 MOVD R3,R8 BLT CR1,cmp32 // Special case for length 32 - 63 MOVD $32,R12 MOVD $48,R6 RLDICR $0,R4,$63-6,R9 // R9 = len &^ 63 ADD R3,R9,R9 // R9 = &s[len &^ 63] ANDCC $63,R4 // (len &= 63) cmp 0. PCALIGN $16 loop64: LXVD2X (R0)(R8),V2 // Scan 64 bytes at a time, starting at &s[0] VCMPEQUBCC V2,V1,V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:10:29 UTC 2023 - 6.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
} // Merge (RLDICL [encoded] (SRDconst [s] x)) into (RLDICL [new_encoded] x) // SRDconst on PPC64 is an extended mnemonic of RLDICL. If the input to an // RLDICL is an SRDconst, and the RLDICL does not rotate its value, the two // operations can be combined. This functions assumes the two opcodes can // be merged, and returns an encoded rotate+mask value of the combined RLDICL.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/a.out.go
AMULLDVCC AMULLDV ARFID ARLDMI ARLDMICC ARLDIMI ARLDIMICC ARLDC ARLDCCC ARLDCR ARLDCRCC ARLDICR ARLDICRCC ARLDCL ARLDCLCC ARLDICL ARLDICLCC ARLDIC ARLDICCC ACLRLSLDI AROTL AROTLW ASLBIA ASLBIE ASLBMFEE ASLBMFEV ASLBMTE ASLD ASLDCC ASRD ASRAD ASRADCC ASRDCC AEXTSWSLI AEXTSWSLICC
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 16K bytes - Viewed (0) -
src/mdo/reader-stax.vm
entities.put("ni", "\u220b"); entities.put("prod", "\u220f"); entities.put("sum", "\u2211"); entities.put("minus", "\u2212"); entities.put("lowast", "\u2217"); entities.put("radic", "\u221a"); entities.put("prop", "\u221d"); entities.put("infin", "\u221e"); entities.put("ang", "\u2220"); entities.put("and", "\u2227"); entities.put("or", "\u2228");
Registered: Wed Jun 12 09:55:16 UTC 2024 - Last Modified: Mon Mar 25 10:50:01 UTC 2024 - 38.1K bytes - Viewed (0) -
src/cmd/vendor/rsc.io/markdown/entity.go
"⤏": "\u290f", "⥤": "\u2964", "∽̱": "\u223d\u0331", "ŕ": "\u0155", "√": "\u221a", "⦳": "\u29b3", "⟩": "\u27e9", "⦒": "\u2992",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 13:01:26 UTC 2024 - 101K bytes - Viewed (0) -
src/mdo/reader.vm
entities.put("ni", "\u220b"); entities.put("prod", "\u220f"); entities.put("sum", "\u2211"); entities.put("minus", "\u2212"); entities.put("lowast", "\u2217"); entities.put("radic", "\u221a"); entities.put("prop", "\u221d"); entities.put("infin", "\u221e"); entities.put("ang", "\u2220"); entities.put("and", "\u2227"); entities.put("or", "\u2228");
Registered: Wed Jun 12 09:55:16 UTC 2024 - Last Modified: Fri Dec 15 06:33:11 UTC 2023 - 42.1K bytes - Viewed (0)