// 2.4: Integer Computational Instructions

	ADDI	$2047, X5				// 9382f27f
	ADDI	$-2048, X5				// 93820280
	ADDI	$2048, X5				// 9382024093820240
	ADDI	$-2049, X5				// 938202c09382f2bf
	ADDI	$4094, X5				// 9382f27f9382f27f
	ADDI	$-4096, X5				// 9382028093820280
	ADDI	$4095, X5				// b71f00009b8fffffb382f201
	ADDI	$-4097, X5				// b7ffffff9b8fffffb382f201
	ADDI	$2047, X5, X6				// 1383f27f
	ADDI	$-2048, X5, X6				// 13830280

(Rsh16x64 <t> x y) && !shiftIsBounded(v) => (SRA  <t> (SignExt16to64 x) (OR <y.Type> y (ADDI <y.Type> [-1] (SLTIU <y.Type> [64] y))))
(Rsh32x8  <t> x y) && !shiftIsBounded(v) => (SRAW <t> x                 (OR <y.Type> y (ADDI <y.Type> [-1] (SLTIU <y.Type> [32] (ZeroExt8to64  y)))))

	REPLREG(SI, X1)
	REPLREG(R8, X2)
	REPLREG(R9, X3)
	REPLREG(R10, X12)
	REPLREG(R11, X13)
	REPLREG(R12, X14)
	REPLREG(R13, X15)
	PADDD X0, X4
	PADDD X1, X5
	PADDD X2, X6
	PADDD X3, X7
	PADDD X12, X8
	PADDD X13, X9
	PADDD X14, X10
	PADDD X15, X11
	MOVOU X4, (4*16)(BX)
	MOVOU X5, (5*16)(BX)
	MOVOU X6, (6*16)(BX)
	MOVOU X7, (7*16)(BX)
	MOVOU X8, (8*16)(BX)
	MOVOU X9, (9*16)(BX)

 * Called from standard RISCV ELF psABI, where x8-x9, x18-x27, f8-f9 and
 * f18-f27 are callee-save, so they must be saved explicitly, along with
 * x1 (LR).
 */
.globl crosscall1
crosscall1:
	sd	x1, -200(sp)
	addi	sp, sp, -200
	sd	x8, 8(sp)
	sd	x9, 16(sp)
	sd	x18, 24(sp)
	sd	x19, 32(sp)
	sd	x20, 40(sp)
	sd	x21, 48(sp)
	sd	x22, 56(sp)
	sd	x23, 64(sp)
	sd	x24, 72(sp)
	sd	x25, 80(sp)
	sd	x26, 88(sp)

func hammerStoreLoadInt64Method(t *testing.T, paddr unsafe.Pointer) {
	addr := (*Int64)(paddr)
	v := addr.Load()
	vlo := v & ((1 << 32) - 1)
	vhi := v >> 32
	if vlo != vhi {
		t.Fatalf("Int64: %#x != %#x", vlo, vhi)
	}
	new := v + 1 + 1<<32
	addr.Store(new)
}

func hammerStoreLoadUint64(t *testing.T, paddr unsafe.Pointer) {
	addr := (*uint64)(paddr)
	v := LoadUint64(addr)

		}

	case 23: /* and $lcon/$addcon,r1,r2 ==> oris+ori+and/addi+and */
		if p.To.Reg == REGTMP || p.Reg == REGTMP {
			c.ctxt.Diag("can't synthesize large constant\n%v", p)
		}
		d := c.vregoff(&p.From)
		r := int(p.Reg)
		if r == 0 {
			r = int(p.To.Reg)
		}

		// With S16CON operand, generate 2 instructions using ADDI for signed value,
		// with 32CON operand generate 3 instructions.

	.type	toc_func, @function
toc_func:
	addis	2,12,.TOC.-toc_func@ha
	addi	2,2,.TOC.-toc_func@l
	.localentry toc_func, .-toc_func
	mflr	0
	std	0,16(1)
	stdu	1,-32(1)

	// Call a NOTOC function which clobbers R2.
	bl	notoc_nor2_func
	nop

	// Call libc random. This should generate a TOC relative plt stub.
	bl	random
	nop

	addi	1,1,32
	ld 	0,16(1)
	mtlr	0
	blr

 * Called from standard lp64d ABI, where $r1, $r3, $r23-$r30, and $f24-$f31
 * are callee-save, so they must be saved explicitly, along with $r1 (LR).
 */
.globl crosscall1
crosscall1:
	addi.d	$r3, $r3, -160
	st.d	$r1, $r3, 0
	st.d	$r23, $r3, 8
	st.d	$r24, $r3, 16
	st.d	$r25, $r3, 24
	st.d	$r26, $r3, 32
	st.d	$r27, $r3, 40
	st.d	$r28, $r3, 48
	st.d	$r29, $r3, 56
	st.d	$r30, $r3, 64

			{Type: PT_NOTE, Flags: 0x0, Off: 0x3f8, Vaddr: 0x0, Paddr: 0x0, Filesz: 0x8ac, Memsz: 0x0, Align: 0x0},
			{Type: PT_LOAD, Flags: PF_X + PF_R, Off: 0x1000, Vaddr: 0x400000, Paddr: 0x0, Filesz: 0x0, Memsz: 0x1000, Align: 0x1000},
			{Type: PT_LOAD, Flags: PF_R, Off: 0x1000, Vaddr: 0x401000, Paddr: 0x0, Filesz: 0x1000, Memsz: 0x1000, Align: 0x1000},
			{Type: PT_LOAD, Flags: PF_W + PF_R, Off: 0x2000, Vaddr: 0x402000, Paddr: 0x0, Filesz: 0x1000, Memsz: 0x1000, Align: 0x1000},

			if target.IsAIX() && rt == objabi.R_POWER_TLS_LE {
				// Fixup val, an addis/addi pair of instructions, which generate a 32b displacement
				// from the threadpointer (R13), into a 16b relocation. XCOFF only supports 16b
				// TLS LE relocations. Likewise, verify this is an addis/addi sequence.
				const expectedOpcodes = 0x3C00000038000000
				const expectedOpmasks = 0xFC000000FC000000