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Results 61 - 70 of 1,612 for OP (0.04 sec)
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tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.cc
LogicalResult ShapeNOp::verify() { ShapeNOp op = *this; const size_t num_tensors = op.getN(); if (op.getNumOperands() != num_tensors) return op.emitOpError() << "requires " << num_tensors << " operand(s), got " << op.getNumOperands() << " operand(s)"; if (op.getNumResults() != num_tensors) return op.emitOpError() << "requires " << num_tensors << " result(s), got "
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 170.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/prepare_quantize_helper.h
lstm_variant->op_code = tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM; } else { op.emitError("ConvertLstmStatsToQDQs pass only supports LSTMs."); return failure(); } lstm_variant->use_projection = !mlir::isa<NoneType>(op.getProjectionWeights().getType()); lstm_variant->use_peephole = !mlir::isa<NoneType>(op.getCellToOutputWeights().getType());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 03 18:01:23 UTC 2024 - 28K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
v.Op = OpARM64MULW return true case OpMul32F: v.Op = OpARM64FMULS return true case OpMul64: v.Op = OpARM64MUL return true case OpMul64F: v.Op = OpARM64FMULD return true case OpMul8: v.Op = OpARM64MULW return true case OpNeg16: v.Op = OpARM64NEG return true case OpNeg32: v.Op = OpARM64NEG return true case OpNeg32F: v.Op = OpARM64FNEGS return true
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/passes/post_quantize.cc
// requantize op to remove the unnecessary requantize op. if (const QuantizedType qtype = QuantizedType::getQuantizedElementType(q.getArg().getType())) { rewriter.setInsertionPoint(op); rewriter.replaceOpWithNewOp<quantfork::DequantizeCastOp>( op, op.getResult().getType(), q.getArg()); return success(); } op.replaceAllUsesWith(q.getArg());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 05 07:39:40 UTC 2024 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/quantization/quantization_context.cc
func_.walk([&](quantfork::QuantizeRegionOp op) { all_ops.push_back(op); }); return all_ops; } KernelSpecs::Signature QuantizeContext::GetSignature( quantfork::QuantizeRegionOp op) { KernelSpecs::Signature signature; signature.reserve(op.getInputSpecs().size() + op.getOutputSpecs().size()); for (int i = 0; i < op.getNumOperands(); ++i) { DeviceTarget::AppendToSignature(GetOperandParams(op, i), &signature); }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 08 01:38:03 UTC 2024 - 13.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_to_vhlo.cc
op->walk([&](Operation *op) { if (op->getDialect()->getNamespace() != "vhlo") return; // Convert operands rewriter.modifyOpInPlace(op, [&]() { rewriter.setInsertionPoint(op); WrapOperandsInUnrealizedCastAndConvert(op, converter, rewriter); // Convert op types for (auto value : op->getResults()) { rewriter.setInsertionPointAfter(value.getDefiningOp());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 15 19:48:51 UTC 2024 - 12.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/call_graph_util.h
worklist.pop(); auto result = u.walk([&](SymbolUserOpInterface op) { if (llvm::isa<T, Types...>(op)) { if (!predicate || predicate(op)) { hits.push_back(op); } else { first_misses.push_back(op); return WalkResult::advance(); } } llvm::SmallVector<func::FuncOp> callees; if (GetCallees(op, symtab, callees).failed()) { return WalkResult::interrupt();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Dec 16 06:18:49 UTC 2023 - 4.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/memcombine.go
v := a[0] if v.Op == shiftOp { v = v.Args[0] } var extOp Op if orOp == OpOr64 && (v.Op == OpZeroExt8to64 || v.Op == OpZeroExt16to64 || v.Op == OpZeroExt32to64) || orOp == OpOr32 && (v.Op == OpZeroExt8to32 || v.Op == OpZeroExt16to32) || orOp == OpOr16 && v.Op == OpZeroExt8to16 { extOp = v.Op v = v.Args[0] } else { return false } if v.Op != OpLoad { return false }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 21 19:45:41 UTC 2024 - 18.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.td
//===----------------------------------------------------------------------===// // DivNoNan and MulNonNan op patterns. //===----------------------------------------------------------------------===// class BinaryNoNanPat<Op FromOp, Op ToOp> : Pat<(FromOp $l, $r), (TF_SelectV2Op (TF_EqualOp $r, (TF_ConstOp:$zero (GetScalarOfType<0> $r)),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 04 13:30:42 UTC 2024 - 24.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_deserialization.cc
auto loader, tensorflow::XlaCallModuleLoader::Create( context, static_cast<int>(op.getVersion()), op.getModule().str(), std::move(disabled_checks), std::move(platforms), /*num_invocation_args=*/op.getArgs().size(), op.getHasTokenInputOutput())); return std::move(*loader).module(); } // Renames functions in the stablehlo module to avoid naming conflicts with
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 23 09:05:47 UTC 2024 - 11.1K bytes - Viewed (0)