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Results 51 - 60 of 111 for getUnit (0.13 sec)
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tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc
if (!value) { return func->emitError() << "'" << attr_name << "' attribute for " << kMaxUnpooling << " does not contain integer values"; } results->push_back(value.getInt()); } return success(); } } // namespace LogicalResult ConvertMaxUnpoolingFunc::RewriteFunc() { func_.eraseBody(); func_.addEntryBlock(); func_->setAttr(kTFImplements,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 17 17:58:54 UTC 2024 - 8.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/mark_input_output_aliases.cc
builder.getI64IntegerAttr(alias_info.output_index)); continue; } // If aliasing attribute already exists, it must match the new value. assert(aliasing_attr.getInt() == alias_info.output_index); } } void MarkInputOutputAliasesPass::runOnOperation() { SmallVector<tf_device::ClusterFuncOp, 4> cluster_funcs; ModuleOp module = getOperation();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 05 04:14:26 UTC 2024 - 7.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc
mlir::IntegerAttr num_cores_per_replica_attr = cluster->getAttrOfType<mlir::IntegerAttr>(kNumCoresPerReplicaAttr); if (num_cores_per_replica_attr) { return num_cores_per_replica_attr.getInt(); } else { return 1; } } // Get the TPUDevicesAndHosts for a cluster that is not replicated. mlir::LogicalResult GetTPUDevicesAndHostsNotReplicated(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Jun 10 20:10:40 UTC 2024 - 32.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/analysis/cost_analysis.cc
if (cost_recorder_ != nullptr) { const auto op_key_attr = op->getAttrOfType<mlir::IntegerAttr>(kOpKeyAttrName); if (op_key_attr) { cost_map_[op] = cost_recorder_->GetCost(op_key_attr.getInt()); return; } } // These ops are cheap regardless of their input sizes. // // TODO(chky): Find a more scalable way to figure out cheap ops.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 7.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.cc
inferredReturnTypes.assign({result_type}); return success(); } auto stride_h = op.getStrideHAttr().getInt(); auto stride_w = op.getStrideWAttr().getInt(); auto dilation_h = op.getDilationHFactorAttr().getInt(); auto dilation_w = op.getDilationWFactorAttr().getInt(); // We don't have EXPLICIT PADDING in TfLite. auto paddings = op.getPadding(); tensorflow::Padding padding;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 169.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_executor.cc
return switchn.emitOpError() << "expects a `num_outs` integer attribute"; // Expect num_outs results + 1 control output. if (switchn.getNumResults() != num_outs.getInt() + 1) return switchn.emitOpError() << "expect `num_outs` (" << num_outs.getInt() << ") results but got " << (switchn.getNumResults() - 1); // Check that operand can be broadcasted to each output type.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 42.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_metadata_utils.cc
llvm::SmallSet<int, 4> dynamic_arg_idx_set; if (dynamic_arg_idx) { for (auto idx : dynamic_arg_idx.getValue()) { dynamic_arg_idx_set.insert(mlir::dyn_cast<IntegerAttr>(idx).getInt()); } } for (auto operand_type_and_idx : llvm::enumerate(op.getOperandTypes())) { Type operand_type = operand_type_and_idx.value(); int index = operand_type_and_idx.index();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 10.3K bytes - Viewed (0) -
src/math/big/natdiv.go
*/ package big import "math/bits" // rem returns r such that r = u%v. // It uses z as the storage for r. func (z nat) rem(u, v nat) (r nat) { if alias(z, u) { z = nil } qp := getNat(0) q, r := qp.div(z, u, v) *qp = q putNat(qp) return r } // div returns q, r such that q = ⌊u/v⌋ and r = u%v = u - q·v. // It uses z and z2 as the storage for q and r.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 14 17:02:38 UTC 2024 - 34.4K bytes - Viewed (0) -
src/cmd/compile/internal/walk/select.go
if ncas == 2 && dflt != nil { cas := cases[0] if cas == dflt { cas = cases[1] } n := cas.Comm ir.SetPos(n) r := ir.NewIfStmt(base.Pos, nil, nil, nil) r.SetInit(cas.Init()) var cond ir.Node switch n.Op() { default: base.Fatalf("select %v", n.Op()) case ir.OSEND: // if selectnbsend(c, v) { body } else { default body } n := n.(*ir.SendStmt)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 22 01:53:41 UTC 2023 - 7.8K bytes - Viewed (0) -
pilot/pkg/networking/core/cluster_tls_test.go
} if got := ctx.CommonTlsContext.GetAlpnProtocols(); got != nil { t.Fatalf("expected alpn list nil as not h2 or Istio_Mutual TLS Setting; got %v", got) } if got := ctx.GetSni(); got != simpleTLSSettingsWithCerts.Sni { t.Fatalf("expected TLSContext SNI %v; got %v", simpleTLSSettingsWithCerts.Sni, got) } }, }, {
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Mon May 06 03:53:05 UTC 2024 - 60.9K bytes - Viewed (0)