// NOT pseudo-instruction
	NOT	X5					// 93c2f2ff
	NOT	X5, X6					// 13c3f2ff

	// NEG/NEGW pseudo-instructions
	NEG	X5					// b3025040
	NEG	X5, X6					// 33035040
	NEGW	X5					// bb025040
	NEGW	X5, X6					// 3b035040

	// This jumps to the second instruction in the function (the
	// first instruction is an invisible stack pointer adjustment).
	JMP	start					// JMP	2

				break
			}

			if arch.IsLoong64RDTIME(op) {
				// The Loong64 RDTIME family of instructions is a bit special,
				// in that both its register operands are outputs
				prog.To = a[0]
				if a[1].Type != obj.TYPE_REG {
					p.errorf("invalid addressing modes for 2nd operand to %s instruction, must be register", op)
					return
				}
				prog.RegTo2 = a[1].Reg
				break
			}
		}

// This contains the majority of valid opcode combinations
// available in cmd/internal/obj/ppc64/asm9.go with
// their valid instruction encodings.

#include "../../../../../runtime/textflag.h"

// In case of index mode instructions, usage of
// (Rx)(R0) is equivalent to (Rx+R0)
// In case of base+displacement mode instructions if
// the offset is 0, usage of (Rx) is equivalent to 0(Rx)
TEXT asmtest(SB),DUPOK|NOSPLIT,$0
	// move constants

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

// This input was created by taking the instruction productions in
// the old assembler's (7a's) grammar and hand-writing complete
// instructions for each rule, to guarantee we cover the same space.

#include "../../../../../runtime/textflag.h"

TEXT	foo(SB), DUPOK|NOSPLIT, $-8

// arithmetic operations

    validations:
      required: false
  - type: textarea
    id: logs
    attributes:
      label: "Logs"
      description: "If possible please include gopls logs. Instructions for capturing them can be found here: https://github.com/golang/tools/blob/master/gopls/doc/troubleshooting.md#capture-logs"
    validations:

		if !ok {
			break
		}
		scratch = operands

		if p.pseudo(word, operands) {
			continue
		}
		i, present := p.arch.Instructions[word]
		if present {
			p.instruction(i, word, cond, operands)
			continue
		}
		p.errorf("unrecognized instruction %q", word)
	}
	if p.errorCount > 0 {
		return nil, false
	}
	p.patch()
	return p.firstProg, true
}

from the value obtained by executing and rounding the instructions individually.
An explicit floating-point type <a href="#Conversions">conversion</a> rounds to
the precision of the target type, preventing fusion that would discard that rounding.
</p>

<p>
For instance, some architectures provide a "fused multiply and add" (FMA) instruction

					i++
				}
				continue
			}
			buf = append(buf, c)
		}

		f := strings.Fields(string(buf))

		// Turn relative (PC) into absolute (PC) automatically,
		// so that most branch instructions don't need comments
		// giving the absolute form.
		if len(f) > 0 && strings.Contains(printed, "(PC)") {
			index := len(f) - 1
			suf := "(PC)"
			for !strings.HasSuffix(f[index], suf) {
				index--

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

// This input was created by taking the instruction productions in
// the old assembler's (5a's) grammar and hand-writing complete
// instructions for each rule, to guarantee we cover the same space.

#include "../../../../../runtime/textflag.h"

TEXT	foo(SB), DUPOK|NOSPLIT, $0

// ADD
//

	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"