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src/cmd/go/testdata/mod/example.com_retract_v1.0.0-good.txt
-- .mod -- module example.com/retract go 1.15 -- .info -- {"Version":"v1.0.0-good"} -- retract.go --
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 26 21:12:37 UTC 2020 - 120 bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64latelower.rules
// Copyright 2022 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // Fold constant shift with extension. (SRAI [c] (MOVBreg x)) && c < 8 => (SRAI [56+c] (SLLI <typ.Int64> [56] x)) (SRAI [c] (MOVHreg x)) && c < 16 => (SRAI [48+c] (SLLI <typ.Int64> [48] x)) (SRAI [c] (MOVWreg x)) && c < 32 => (SRAI [32+c] (SLLI <typ.Int64> [32] x))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Oct 24 03:45:10 UTC 2022 - 980 bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(LT (CMPWconst [0] x) yes no) => (TBNZ [31] x yes no) (LT (CMPconst [0] x) yes no) => (TBNZ [63] x yes no) // fold offset into address (ADDconst [off1] (MOVDaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVDaddr [int32(off1)+off2] {sym} ptr) // fold address into load/store. // Do not fold global variable access in -dynlink mode, where it will // be rewritten to use the GOT via REGTMP, which currently cannot handle
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/go/testdata/script/list_overlay.txt
m m/dir m/dir2 m/dir3 -- go.mod -- // TODO(#39958): Support and test overlays including go.mod itself (especially if mod=readonly) module m go 1.16 -- dir2/h.go -- package dir2 -- dir3/good.go -- package dir3 -- dir3/bad.go -- // no package statement -- overlay.json -- { "Replace": { "f.go": "overlay/f_go", "dir/g.go": "overlay/dir_g_go",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Oct 12 21:13:04 UTC 2020 - 1.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(EQ (SGT x (MOVVconst [0])) yes no) => (LEZ x yes no) (MOVBUreg x:((SGT|SGTU) _ _)) => x // fold offset into address (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr) // fold address into load/store // Do not fold global variable access in -dynlink mode, where it will be rewritten
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS.rules
(EQ (SGTconst [0] x) yes no) => (GEZ x yes no) (NE (SGTzero x) yes no) => (GTZ x yes no) (EQ (SGTzero x) yes no) => (LEZ x yes no) // fold offset into address (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) => (MOVWaddr [off1+off2] {sym} ptr) // fold address into load/store (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem) && (is16Bit(int64(off1+off2)) || x.Uses == 1) => (MOVBload [off1+off2] {sym} ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 35.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
(NE (SGT x (MOVVconst [0])) yes no) => (GTZ x yes no) (EQ (SGT x (MOVVconst [0])) yes no) => (LEZ x yes no) // fold offset into address (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr) // fold address into load/store (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
(MOVWreg x:(Arg <t>)) && t.IsSigned() && t.Size() <= 4 => x // Fold zero extensions into constants. (MOVBZreg (MOVDconst [c])) => (MOVDconst [int64( uint8(c))]) (MOVHZreg (MOVDconst [c])) => (MOVDconst [int64(uint16(c))]) (MOVWZreg (MOVDconst [c])) => (MOVDconst [int64(uint32(c))]) // Fold sign extensions into constants. (MOVBreg (MOVDconst [c])) => (MOVDconst [int64( int8(c))])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64latelower.rules
(MOVWreg x:(MOVHUloadidx2 _ _ _)) => (MOVDreg x) (MOVWreg x:(MOVWloadidx4 _ _ _)) => (MOVDreg x) (MOVWUreg x:(MOVHUloadidx2 _ _ _)) => (MOVDreg x) (MOVWUreg x:(MOVWUloadidx4 _ _ _)) => (MOVDreg x) // fold double extensions (MOVBreg x:(MOVBreg _)) => (MOVDreg x) (MOVBUreg x:(MOVBUreg _)) => (MOVDreg x) (MOVHreg x:(MOVBreg _)) => (MOVDreg x) (MOVHreg x:(MOVBUreg _)) => (MOVDreg x) (MOVHreg x:(MOVHreg _)) => (MOVDreg x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 4.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
=> (SET(B|AE)store [off] {sym} ptr (BTLconst [31] x) mem) // Fold combinations of bit ops on same bit. An example is math.Copysign(c,-1) (BTSQconst [c] (BTRQconst [c] x)) => (BTSQconst [c] x) (BTSQconst [c] (BTCQconst [c] x)) => (BTSQconst [c] x) (BTRQconst [c] (BTSQconst [c] x)) => (BTRQconst [c] x) (BTRQconst [c] (BTCQconst [c] x)) => (BTRQconst [c] x) // Fold boolean negation into SETcc. (XORLconst [1] (SETNE x)) => (SETEQ x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0)