(Rsh16x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAD (MOVHreg x) y)
(Rsh8x(64|32|16|8)   x y) && shiftIsBounded(v) => (SRAD (MOVBreg x) y)

// Unbounded shifts. Go shifts saturate to 0 or -1 when shifting beyond the number of
// bits in a type, PPC64 shifts do not (see the ISA for details).
//
// Note, y is always non-negative.
//

(Max(64|32)F <t> x y) => (Neg(64|32)F <t> (Min(64|32)F <t> (Neg(64|32)F <t> x) (Neg(64|32)F <t> y)))

(CvtBoolToUint8 ...) => (Copy ...)

// Lowering shifts
// Unsigned shifts need to return 0 if shift amount is >= width of shifted value.
//   result = (arg << shift) & (shift >= argbits ? 0 : 0xffffffffffffffff)
(Lsh64x(64|32|16|8) <t> x y) && !shiftIsBounded(v) => (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMP(Q|L|W|B)const y [64])))

	case arg_immediate_LSL_UBFM_32M_bitfield_0_31_immr:
		imms := (x >> 10) & (1<<6 - 1)
		shift := 31 - imms
		if shift > 31 {
			return nil
		}
		return Imm{shift, true}

	case arg_immediate_LSL_UBFM_64M_bitfield_0_63_immr:
		imms := (x >> 10) & (1<<6 - 1)
		shift := 63 - imms
		if shift > 63 {
			return nil
		}
		return Imm{shift, true}

	case arg_immediate_LSR_UBFM_32M_bitfield_0_31_immr:

		fmt.Printf("\t\t%d %d\n", p.From.Type, p.To.Type)
	}

	if (p.As == ASRL || p.As == ASRA) && p.From.Type == obj.TYPE_CONST && p.From.Offset == 0 {
		// Right shifts are weird - a shift that looks like "shift by constant 0" actually
		// means "shift by constant 32". Use left shift in this situation instead.
		// See issue 64715.
		// TODO: rotate by 0? Not currently supported, but if we ever do then include it here.
		p.As = ASLL
	}

}

func newPPC64ShiftAuxInt(sh, mb, me, sz int64) int32 {
	if sh < 0 || sh >= sz {
		panic("PPC64 shift arg sh out of range")
	}
	if mb < 0 || mb >= sz {
		panic("PPC64 shift arg mb out of range")
	}
	if me < 0 || me >= sz {
		panic("PPC64 shift arg me out of range")
	}
	return int32(sh<<16 | mb<<8 | me)
}

func GetPPC64Shiftsh(auxint int64) int64 {

(AndB ...) => (AND ...)
(OrB ...) => (OR ...)
(EqB x y) => (XORconst [1] (XOR <typ.Bool> x y))
(NeqB ...) => (XOR ...)
(Not x) => (XORconst [1] x)

// shifts
// hardware instruction uses only the low byte of the shift
// we compare to 256 to ensure Go semantics for large shifts
(Lsh32x32 x y) => (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])

		out := new(Int).Lsh(in, test.shift)
		out = out.Rsh(out, test.shift)

		if !isNormalized(out) {
			t.Errorf("#%d: %v is not normalized", i, *out)
		}
		if in.Cmp(out) != 0 {
			t.Errorf("#%d: got %s want %s", i, out, in)
		}
	}
	for i, test := range lshTests {
		in, _ := new(Int).SetString(test.in, 10)
		out := new(Int).Lsh(in, test.shift)
		out.Rsh(out, test.shift)

	case ssa.OpPPC64CLRLSLWI:
		r := v.Reg()
		r1 := v.Args[0].Reg()
		shifts := v.AuxInt
		p := s.Prog(v.Op.Asm())
		// clrlslwi ra,rs,mb,sh will become rlwinm ra,rs,sh,mb-sh,31-sh as described in ISA
		p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftmb(shifts)}
		p.AddRestSourceConst(ssa.GetPPC64Shiftsh(shifts))
		p.Reg = r1
		p.To.Type = obj.TYPE_REG
		p.To.Reg = r

	case ssa.OpPPC64CLRLSLDI:

}

func.func @roll_scalar_axis(%arg0: tensor<3x8x4xi32>) -> tensor<3x8x4xi32> {
  %axis = "tf.Const"() {value = dense<1> : tensor<i32>} : () -> tensor<i32>
  %shift = "tf.Const"() {value = dense<2> : tensor<i32>} : () -> tensor<i32>
  %0 = "tf.Roll"(%arg0, %shift, %axis) : (tensor<3x8x4xi32>, tensor<i32>, tensor<i32>) -> tensor<3x8x4xi32>
  func.return %0 : tensor<3x8x4xi32>
  // CHECK-LABEL: roll_scalar_axis

r n,r,i,o,a,s,u,l=x[e+" "];if(l)return t?0:l.slice(0);a=e,s=[],u=b.preFilter;while(a){for(o in n&&!(r=_.exec(a))||(r&&(a=a.slice(r[0].length)||a),s.push(i=[])),n=!1,(r=z.exec(a))&&(n=r.shift(),i.push({value:n,type:r[0].replace(B," ")}),a=a.slice(n.length)),b.filter)!(r=G[o].exec(a))||u[o]&&!(r=u[o](r))||(n=r.shift(),i.push({value:n,type:o,matches:r}),a=a.slice(n.length));if(!n)break}return t?a.length:a?se.error(e):x(e,s).slice(0)},f=se.compile=function(e,t){var n,y,v,m,x,r,i=[],o=[],a=A[e+" "];i...