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Results 1 - 6 of 6 for AuxInt (0.1 sec)
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src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "RORWconst", argLength: 1, reg: gp11, asm: "RORW", aux: "Int64"}, // uint32(arg0) right rotate by auxInt bits, auxInt should be in the range 0 to 31. {name: "EXTRconst", argLength: 2, reg: gp21, asm: "EXTR", aux: "Int64"}, // extract 64 bits from arg0:arg1 starting at lsb auxInt, auxInt should be in the range 0 to 63.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
case ssa.OpPPC64ISEL, ssa.OpPPC64ISELZ: // ISEL AuxInt ? arg0 : arg1 // ISELZ is a special case of ISEL where arg1 is implicitly $0. // // AuxInt value indicates conditions 0=LT 1=GT 2=EQ 3=SO 4=GE 5=LE 6=NE 7=NSO. // ISEL accepts a CR bit argument, not a condition as expressed by AuxInt. // Convert the condition to a CR bit argument by the following conversion: // // AuxInt&3 ? arg0 : arg1 for conditions LT, GT, EQ, SO
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/prove.go
old, ok := ft.limits[v.ID] if !ok { old = noLimit if v.isGenericIntConst() { switch d { case signed: old.min, old.max = v.AuxInt, v.AuxInt if v.AuxInt >= 0 { old.umin, old.umax = uint64(v.AuxInt), uint64(v.AuxInt) } case unsigned: old.umin = v.AuxUnsigned() old.umax = old.umin if int64(old.umin) >= 0 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:30:21 UTC 2024 - 48.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
} return int32(sh<<16 | mb<<8 | me) } func GetPPC64Shiftsh(auxint int64) int64 { return int64(int8(auxint >> 16)) } func GetPPC64Shiftmb(auxint int64) int64 { return int64(int8(auxint >> 8)) } func GetPPC64Shiftme(auxint int64) int64 { return int64(int8(auxint)) } // Test if this value can encoded as a mask for a rlwinm like
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
// Rewrite to a cmp int64(0) to lower into ANDCCconst in the latelower pass. (CMP(W|U|WU)const [0] a:(ANDconst [n] z)) => (CMPconst [0] a) // SETBC auxInt values 0=LT 1=GT 2=EQ Crbit==1 ? 1 : 0 // SETBCR auxInt values 0=LT 1=GT 2=EQ Crbit==1 ? 0 : 1 (Equal cmp) => (SETBC [2] cmp) (NotEqual cmp) => (SETBCR [2] cmp) (LessThan cmp) => (SETBC [0] cmp) (FLessThan cmp) => (SETBC [0] cmp)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/debug.go
} synthesizeOpIntFloatArg := func(n *ir.Name, t *types.Type, reg abi.RegIndex, sl LocalSlot) *Value { aux := &AuxNameOffset{n, sl.Off} op, auxInt := ArgOpAndRegisterFor(reg, f.ABISelf) v := f.newValueNoBlock(op, t, pos) v.AuxInt = auxInt v.Aux = aux v.Args = nil v.Block = f.Entry newValues = append(newValues, v) addToNV(v, sl)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jun 10 19:44:43 UTC 2024 - 58.4K bytes - Viewed (0)