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Results 11 - 20 of 120 for OP (0.07 sec)

  1. src/cmd/internal/obj/mips/asm0.go

    		return OP(0, 6)
    	case ASRA:
    		return OP(0, 7)
    	case AROTR:
    		return OP(8, 6)
    	case ASLLV:
    		return OP(2, 4)
    	case ASRLV:
    		return OP(2, 6)
    	case ASRAV:
    		return OP(2, 7)
    	case AROTRV:
    		return OP(10, 6)
    	case AADDV:
    		return OP(5, 4)
    	case AADDVU:
    		return OP(5, 5)
    	case ASUBV:
    		return OP(5, 6)
    	case ASUBVU, ANEGV:
    		return OP(5, 7)
    	case AREM,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 17:46:09 UTC 2024
    - 53.6K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc

            op.getLoc(), /*resultType0=*/
            mlir::cast<TensorType>(op.getResult().getType())
                .clone(output_uniform_quantized_type),
            /*lhs=*/op.getLhs(), /*rhs=*/op.getRhs(),
            /*dot_dimension_numbers=*/op.getDotDimensionNumbers(),
            /*precision_config=*/op.getPrecisionConfigAttr());
    
        rewriter.replaceAllUsesWith(op.getResult(), new_dot_general_op.getResult());
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 64.6K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ppc64/ssa.go

    		// then clear remaining sizes as available
    		for rem > 0 {
    			op, size := ppc64.AMOVB, int64(1)
    			switch {
    			case rem >= 8:
    				op, size = ppc64.AMOVD, 8
    			case rem >= 4:
    				op, size = ppc64.AMOVW, 4
    			case rem >= 2:
    				op, size = ppc64.AMOVH, 2
    			}
    			p := s.Prog(op)
    			p.From.Type = obj.TYPE_REG
    			p.From.Reg = ppc64.REG_R0
    			p.To.Type = obj.TYPE_MEM
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 55.4K bytes
    - Viewed (0)
  4. tensorflow/c/eager/c_api_test.cc

      TFE_Op* op = TFE_NewOp(ctx, "ReadVariableOp", status);
      ASSERT_EQ(TF_OK, TF_GetCode(status)) << TF_Message(status);
      TFE_OpSetAttrType(op, "dtype", TF_FLOAT);
      TFE_OpAddInput(op, var_handle, status);
      ASSERT_EQ(TF_OK, TF_GetCode(status)) << TF_Message(status);
      int num_retvals = 1;
      TFE_TensorHandle* value_handle = nullptr;
      TFE_Execute(op, &value_handle, &num_retvals, status);
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Aug 03 20:50:20 UTC 2023
    - 94.6K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td

           SingleBlockImplicitTerminator<"YieldOp">]> {
      let summary = "while operation";
      let description = [{
      The tf.WhileRegion op represents a while loop using 2 regions and a set of
      iteration variables. The iteration variables maintained by this Op have the
      same types as the inputs. The Op executes a while loop described by the
      following pseudo code:
    
      ```
         func WhileRegionOp(inputs) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Apr 24 04:08:35 UTC 2024
    - 90.5K bytes
    - Viewed (0)
  6. src/regexp/syntax/parse.go

    		m = min(m, r)
    	}
    	return m
    }
    
    // op pushes a regexp with the given op onto the stack
    // and returns that regexp.
    func (p *parser) op(op Op) *Regexp {
    	re := p.newRegexp(op)
    	re.Flags = p.flags
    	return p.push(re)
    }
    
    // repeat replaces the top stack element with itself repeated according to op, min, max.
    // before is the regexp suffix starting at the repetition operator.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 02 13:59:01 UTC 2024
    - 52.1K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/transforms/optimize_patterns.td

      defm : FuseActFnIntoConvOpPat<!cast<Op>(actFnPair[0]), !cast<ConstantStrAttr>(actFnPair[1])>;
      defm : FuseActFnIntoPoolOpPat<!cast<Op>(actFnPair[0]), !cast<ConstantStrAttr>(actFnPair[1])>;
    }
    
    class CanFuseConvOrDepthwiseConv<string is_depthwise> : Constraint<
      CPred<"TFL::CanFuseConvOrDepthwiseConv($0, $1, " # is_depthwise # ")">>;
    
    // If we see a binary op (add, sub) op adding a constant value to a convolution
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 16 20:31:41 UTC 2024
    - 66.4K bytes
    - Viewed (0)
  8. src/go/types/expr.go

    		}
    		x.val = constant.UnaryOp(op, x.val, prec)
    		x.expr = e
    		check.overflow(x, x.Pos())
    		return
    	}
    
    	x.mode = value
    	// x.typ remains unchanged
    }
    
    func isShift(op token.Token) bool {
    	return op == token.SHL || op == token.SHR
    }
    
    func isComparison(op token.Token) bool {
    	// Note: tokens are not ordered well to make this much easier
    	switch op {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 29 02:09:54 UTC 2024
    - 49.7K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/prove.go

    		}
    
    		switch nxt.Op {
    		case OpAdd8:
    			nxt.Op = OpSub8
    		case OpAdd16:
    			nxt.Op = OpSub16
    		case OpAdd32:
    			nxt.Op = OpSub32
    		case OpAdd64:
    			nxt.Op = OpSub64
    		case OpSub8:
    			nxt.Op = OpAdd8
    		case OpSub16:
    			nxt.Op = OpAdd16
    		case OpSub32:
    			nxt.Op = OpAdd32
    		case OpSub64:
    			nxt.Op = OpAdd64
    		default:
    			panic("unreachable")
    		}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:30:21 UTC 2024
    - 48.9K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/rewrite.go

    	// then they can't overlap.
    	switch p1.Op {
    	case OpAddr, OpLocalAddr:
    		if p2.Op == OpAddr || p2.Op == OpLocalAddr || p2.Op == OpSP {
    			return true
    		}
    		return (p2.Op == OpArg || p2.Op == OpArgIntReg) && p1.Args[0].Op == OpSP
    	case OpArg, OpArgIntReg:
    		if p2.Op == OpSP || p2.Op == OpLocalAddr {
    			return true
    		}
    	case OpSP:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 64.2K bytes
    - Viewed (0)
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