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tensorflow/compiler/mlir/tfr/tests/decompose.mlir
// CHECK-NEXT: tfr.return %[[id]] : !tfr.tensor } // CHECK-LABEL: @tf__fused_n tfr.func @tf__fused_n( %arg0: !tfr.tensor, %arg1: !tfr.tensor_list, %arg2: index {tfr.name="A",tfr.default=1:index}) -> !tfr.tensor_list { %0 = tfr.call @tf__intermediate(%arg0) : (!tfr.tensor) -> !tfr.tensor %1 = tfr.get_element %arg1[%arg2] : (!tfr.tensor_list, index) -> !tfr.tensor
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 16.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/constant-fold.mlir
func.func @testPow(%arg0: tensor<4xf32>, %arg1: tensor<4xf32>) -> (tensor<4xf32>, tensor<4xf32>, tensor<4xf32>) { %cst_zero = arith.constant dense<0.0> : tensor<f32> %cst_one = arith.constant dense<1.0> : tensor<f32> // CHECK-DAG: %[[RES_NO_FOLD:.*]] = "tf.Pow"(%arg0, %arg1) %0 = "tf.Pow"(%arg0, %arg1) : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jan 31 23:22:24 UTC 2024 - 36.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize_op_with_region.mlir
%4 = "quantfork.qcast"(%arg0) {volatile} : (tensor<2x3x1x1024xf32>) -> tensor<2x3x1x1024x!quant.uniform<i8:f32, 5.000000e-01:2>> %5 = "quantfork.dcast"(%4) : (tensor<2x3x1x1024x!quant.uniform<i8:f32, 5.000000e-01:2>>) -> tensor<2x3x1x1024xf32> %6 = "stablehlo.reduce_window"(%5, %3) ({ ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %14 = stablehlo.maximum %arg1, %arg2 : tensor<f32> stablehlo.return %14 : tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 18.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/defer_activation_transpose.mlir
func.func @reduce_window_max_activation_transpose(%arg0: tensor<1x16x16x4xf32>) -> tensor<1x4x8x8xf32> { %0 = stablehlo.constant dense<0xFF800000> : tensor<f32> // -inf %1 = stablehlo.transpose %arg0, dims = [0, 3, 1, 2] : (tensor<1x16x16x4xf32>) -> tensor<1x4x16x16xf32> %2 = "stablehlo.reduce_window"(%1, %0) ({ ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %3 = stablehlo.maximum %arg1, %arg2 : tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 14.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions_drq.mlir
// CHECK: %0 = "tf.PartitionedCall"(%arg0, %[[q_w]], %[[scale]], %[[zp]]) <{config = "", config_proto = "", executor_type = "", // CHECK-SAME: f = @quantized_matmul_fn_0}> : (tensor<2x12xf32>, tensor<12x2x!tf_type.qint8>, tensor<f32>, tensor<i32>) -> tensor<*xf32> // CHECK-LABEL: func private @quantized_matmul_fn_0 // CHECK: %0 = "tf.UniformQuantizedDotHybrid"(%arg0, %arg1, %arg2, %arg3) // CHECK-SAME: rhs_quantization_axis = -1 : i64
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 9.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/functional-control-flow-to-cfg.mlir
func.func private @testIf1Else(tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> // CHECK-LABEL: func @testIf1Result(%arg0: tensor<i1>, %arg1: tensor<*xf32>, %arg2: tensor<*xf32>) func.func @testIf1Result(tensor<i1>, tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> { ^bb0(%arg0: tensor<i1>, %arg1: tensor<*xf32>, %arg2: tensor<*xf32>): %1 = "tf.If"(%arg0, %arg1, %arg2) { then_branch = @testIf1Then, else_branch = @testIf1Else, is_stateless = false
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 12.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/resource-device-inference.mlir
// CHECK-LABEL: func @ifregion_then // CHECK-SAME: (%arg0: {{.+}} {tf.device = "/TPU:0"}, %arg1: {{.+}} {tf.device = "/TPU:1"} func.func @ifregion_then( %arg0: !tf_res, %arg1: !tf_res) { tf_executor.graph { // CHECK: tf_executor.island %island = tf_executor.island { // CHECK-NEXT: "tf.Identity" // CHECK-SAME: {device = "/TPU:0"} %id0 = "tf.Identity"(%arg0) : (!tf_res) -> !tf_res
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 17 16:01:45 UTC 2022 - 18.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_custom_aggregation_ops.mlir
module { func.func @wrap_composite_func(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> { %0 = "tf.PartitionedCall"(%arg0, %arg1) <{f = @composite_conv2d_with_relu6_fn}> {_tfl_quant_trait = "fully_quantizable"} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> func.return %0 : tensor<*xf32> } func.func @no_composite_func(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 32.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/dilated-conv.mlir
func.func @testDilatedConv(%arg0: tensor<1x128x128x3xf32>, %arg1: tensor<5x5x3x8xf32>) -> tensor<1x120x120x8xf32> { %cst = arith.constant dense<[2, 2]> : tensor<2xi32> %cst_0 = arith.constant dense<4> : tensor<2x2xi32> %0 = "tf.SpaceToBatchND"(%arg0, %cst, %cst_0) : (tensor<1x128x128x3xf32>, tensor<2xi32>, tensor<2x2xi32>) -> tensor<4x68x68x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 44.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
{name: "FMSUB", argLength: 3, reg: fp31, asm: "FMSUB"}, // arg0*arg1 - arg2 {name: "FMSUBS", argLength: 3, reg: fp31, asm: "FMSUBS"}, // arg0*arg1 - arg2 {name: "SRAD", argLength: 2, reg: gp21cxer, asm: "SRAD"}, // signed arg0 >> (arg1&127), 64 bit width (note: 127, not 63!) {name: "SRAW", argLength: 2, reg: gp21cxer, asm: "SRAW"}, // signed arg0 >> (arg1&63), 32 bit width
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0)