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tensorflow/compiler/mlir/tensorflow/tests/resource-alias-analysis-test.mlir
func.return %id0, %id0, %arg1 : !tf_res, !tf_res, !tf_res } // expected-remark@below {{Region #0, Arg #0, ID 0 : 0}} // expected-remark@below {{Region #0, Arg #1, ID 1 : 1}} func.func @case_branch2(%arg0: !tf_res, %arg1: !tf_res) -> (!tf_res, !tf_res, !tf_res) { func.return %arg0, %arg0, %arg1 : !tf_res, !tf_res, !tf_res } // ----- // Test aliasing through WhileOp
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jul 21 17:19:47 UTC 2023 - 22.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/embedding_sequencing.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 01 21:27:49 UTC 2023 - 19.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf_executor_ops_invalid.mlir
tf_executor.fetch %arg0 : tensor<*xf32> } func.return %0 : tensor<*xf32> } // ----- func.func @invalid_nextiteration(%arg0: tensor<*xf32>, %arg1: !tf_executor.token) -> tensor<*xf32> { %0 = tf_executor.graph { "tf_executor.NextIteration.Sink"(%arg1, %arg0) : (!tf_executor.token, tensor<*xf32>) -> ()
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Oct 19 01:12:10 UTC 2023 - 28.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/update_control_dependencies.mlir
// ----- func.func @multiple_return_no_controls_needed(%arg0: tensor<*xi32>, %arg1: tensor<i32>) -> (tensor<*xi32>, tensor<*xi32>) { %graph:2 = tf_executor.graph { %add1, %add1_control = tf_executor.island wraps "tf.Add"(%arg0, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> %add2, %add2_control = tf_executor.island wraps "tf.Add"(%add1, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Nov 03 18:12:49 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
{name: "FMSUB", argLength: 3, reg: fp31, asm: "FMSUB"}, // arg0*arg1 - arg2 {name: "FMSUBS", argLength: 3, reg: fp31, asm: "FMSUBS"}, // arg0*arg1 - arg2 {name: "SRAD", argLength: 2, reg: gp21cxer, asm: "SRAD"}, // signed arg0 >> (arg1&127), 64 bit width (note: 127, not 63!) {name: "SRAW", argLength: 2, reg: gp21cxer, asm: "SRAW"}, // signed arg0 >> (arg1&63), 32 bit width
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/einsum.mlir
func.return %0 : tensor<3x4x6xf32> // CHECK-LABEL: einsum_broadcast // CHECK: "tf.BatchMatMulV2"(%arg0, %arg1) <{adj_x = false, adj_y = false}> : (tensor<3x4x5xf32>, tensor<5x6xf32>) -> tensor<3x4x6xf32> } func.func @einsum_broadcast4(%arg0: tensor<3x4x5x6x7xf32>, %arg1: tensor<7x8xf32>) -> tensor<3x4x5x6x8xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 25.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/control_flow.mlir
} func.func @branch0(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { %0 = "tf.Add" (%arg0, %arg1) {device = "/device:CPU:0"} : (tensor<f32>, tensor<f32>) -> tensor<f32> func.return %0 : tensor<f32> } func.func @branch1(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { %0 = "tf.Add" (%arg0, %arg1) {device = "/device:CPU:0"} : (tensor<f32>, tensor<f32>) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 14 00:40:32 UTC 2024 - 17.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/replace_stablehlo_ops_in_main_function_with_xla_call_module_ops.mlir
func.func private @composite_dot_general_fn_1(%arg0: tensor<1x1024xf32>, %arg1: tensor<1024x3xf32>, %arg2: tensor<1x3xf32>) -> tensor<1x3xf32> attributes {_from_xla_call_module, tf_quant.composite_function} { %0 = stablehlo.dot_general %arg0, %arg1, contracting_dims = [1] x [0], precision = [DEFAULT, DEFAULT] : (tensor<1x1024xf32>, tensor<1024x3xf32>) -> tensor<1x3xf32> %1 = stablehlo.add %0, %arg2 : tensor<1x3xf32> return %0 : tensor<1x3xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 01:09:50 UTC 2024 - 39.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_hashtable_ops_as_args.mlir
// CHECK: func.func private @serving_default // CHECK-SAME: (%arg0: tensor<?x!tf_type.string>, %arg1: tensor<!tf_type.resource>) -> tensor<*xi64> // CHECK-SAME: tf.entry_function = {control_outputs = "", inputs = "input_vocabs:0,hash_table_1:0", outputs = "FakeQuantWithMinMaxArgs_2:0"} // CHECK: "tf.PartitionedCall"(%arg0, %arg1) func.func private @serving_default1(%arg0: tensor<?x!tf_type.string> ) -> (tensor<*xi64>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 15 05:41:44 UTC 2024 - 13.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/lstm.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 06 18:55:51 UTC 2023 - 10.2K bytes - Viewed (0)