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Results 31 - 40 of 103 for dX (0.06 sec)
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src/cmd/asm/internal/asm/testdata/avx512enc/avx512_4vnniw.s
VP4DPWSSD 15(DX)(BX*8), [Z2-Z5], K4, Z17 // 62e26f4c528cda0f000000 VP4DPWSSD 7(SI)(DI*1), [Z12-Z15], K4, Z17 // 62e21f4c528c3e07000000 VP4DPWSSD 15(DX)(BX*8), [Z12-Z15], K4, Z17 // 62e21f4c528cda0f000000 VP4DPWSSD 7(SI)(DI*1), [Z22-Z25], K4, Z17 // 62e24f44528c3e07000000 VP4DPWSSD 15(DX)(BX*8), [Z22-Z25], K4, Z17 // 62e24f44528cda0f000000
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 1.9K bytes - Viewed (0) -
src/runtime/time_linux_amd64.s
// so this function is reentrant. MOVQ m_vdsoPC(BX), CX MOVQ m_vdsoSP(BX), DX MOVQ CX, 0(SP) MOVQ DX, 8(SP) LEAQ sec+0(FP), DX MOVQ -8(DX), CX // Sets CX to function return address. MOVQ CX, m_vdsoPC(BX) MOVQ DX, m_vdsoSP(BX) CMPQ R14, m_curg(BX) // Only switch if on curg. JNE noswitch MOVQ m_g0(BX), DX MOVQ (g_sched+gobuf_sp)(DX), SP // Set SP to g0 stack noswitch:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 2K bytes - Viewed (0) -
src/reflect/asm_amd64.s
// frame is specially handled in the runtime. See the comment above LOCAL_RETVALID. LEAQ LOCAL_REGARGS(SP), R12 CALL runtime·spillArgs(SB) MOVQ DX, 24(SP) // outside of moveMakeFuncArgPtrs's arg area MOVQ DX, 0(SP) MOVQ R12, 8(SP) CALL ·moveMakeFuncArgPtrs(SB) MOVQ 24(SP), DX MOVQ DX, 0(SP) LEAQ argframe+0(FP), CX MOVQ CX, 8(SP) MOVB $0, LOCAL_RETVALID(SP) LEAQ LOCAL_RETVALID(SP), AX MOVQ AX, 16(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 01 22:33:29 UTC 2021 - 2.8K bytes - Viewed (0) -
src/internal/bytealg/compare_amd64.s
// CX = a_cap (unused) // DI = b_base (want in DI) // SI = b_len (want in DX) // R8 = b_cap (unused) MOVQ SI, DX MOVQ AX, SI JMP cmpbody<>(SB) TEXT runtime·cmpstring<ABIInternal>(SB),NOSPLIT,$0-40 // AX = a_base (want in SI) // BX = a_len (want in BX) // CX = b_base (want in DI) // DI = b_len (want in DX) MOVQ AX, SI MOVQ DI, DX MOVQ CX, DI JMP cmpbody<>(SB) // input: // SI = a
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 4.3K bytes - Viewed (0) -
src/crypto/aes/asm_amd64.s
CALL _expand_key_128<>(SB) Lexp_dec: // dec SUBQ $16, BX MOVUPS (BX), X1 MOVUPS X1, (DX) DECQ CX Lexp_dec_loop: MOVUPS -16(BX), X1 AESIMC X1, X0 MOVUPS X0, 16(DX) SUBQ $16, BX ADDQ $16, DX DECQ CX JNZ Lexp_dec_loop MOVUPS -16(BX), X0 MOVUPS X0, 16(DX) RET TEXT _expand_key_128<>(SB),NOSPLIT,$0 PSHUFD $0xff, X1, X1 SHUFPS $0x10, X0, X4 PXOR X4, X0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 5.4K bytes - Viewed (0) -
src/runtime/sys_solaris_amd64.s
get_tls(BX) MOVQ DX, g(BX) MOVQ DI, g_m(DX) // Layout new m scheduler stack on os stack. MOVQ SP, AX MOVQ AX, (g_stack+stack_hi)(DX) SUBQ $(0x100000), AX // stack size MOVQ AX, (g_stack+stack_lo)(DX) ADDQ $const_stackGuard, AX MOVQ AX, g_stackguard0(DX) MOVQ AX, g_stackguard1(DX) // Someday the convention will be D is always cleared. CLD
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:29:00 UTC 2023 - 6.4K bytes - Viewed (0) -
src/internal/bytealg/equal_amd64.s
VPCMPEQB Y2, Y3, Y5 VPAND Y4, Y5, Y6 VPMOVMSKB Y6, DX ADDQ $64, SI ADDQ $64, DI SUBQ $64, BX CMPL DX, $0xffffffff JEQ hugeloop_avx2 VZEROUPPER XORQ AX, AX // return 0 RET bigloop_avx2: VZEROUPPER // 8 bytes at a time using 64-bit register PCALIGN $16 bigloop: CMPQ BX, $8 JBE leftover MOVQ (SI), CX MOVQ (DI), DX ADDQ $8, SI ADDQ $8, DI SUBQ $8, BX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 17 16:34:40 UTC 2023 - 2.8K bytes - Viewed (0) -
src/math/dim_amd64.s
CMPQ AX, R8 JEQ isPosInf MOVQ y+8(FP), R9 CMPQ AX, R9 JEQ isPosInf // NaN special cases MOVQ $~(1<<63), DX // bit mask MOVQ $PosInf, AX MOVQ R8, BX ANDQ DX, BX // x = |x| CMPQ AX, BX JLT isMaxNaN MOVQ R9, CX ANDQ DX, CX // y = |y| CMPQ AX, CX JLT isMaxNaN // ±0 special cases ORQ CX, BX JEQ isMaxZero MOVQ R8, X0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 15 15:48:19 UTC 2021 - 1.9K bytes - Viewed (0) -
src/runtime/vlop_386.s
MOVL lo64+0(FP), CX MOVL a_lo+4(FP), AX MULL b+12(FP) MOVL AX, 0(CX) MOVL DX, BX MOVL a_hi+8(FP), AX MULL b+12(FP) ADDL AX, BX ADCL $0, DX MOVL BX, 4(CX) MOVL DX, AX MOVL AX, hi32+16(FP) RET TEXT runtime·_div64by32(SB), NOSPLIT, $0 MOVL r+12(FP), CX MOVL a_lo+0(FP), AX MOVL a_hi+4(FP), DX DIVL b+8(FP) MOVL DX, 0(CX) MOVL AX, q+16(FP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/vpclmulqdq_avx512f.s
VPCLMULQDQ $97, 15(DX)(BX*8), Z26, Z24 // 62632d404484da0f00000061 or 6263ad404484da0f00000061 VPCLMULQDQ $97, Z9, Z0, Z12 // 62537d4844e161 or 6253fd4844e161 VPCLMULQDQ $97, Z3, Z0, Z12 // 62737d4844e361 or 6273fd4844e361 VPCLMULQDQ $97, 7(SI)(DI*1), Z0, Z12 // 62737d4844a43e0700000061 or 6273fd4844a43e0700000061
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 8.2K bytes - Viewed (0)