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Results 11 - 20 of 129 for z0 (0.02 sec)

  1. src/cmd/vendor/golang.org/x/sys/windows/mkerrors.bash

    		unset vtype
    		if [[ $line =~ ^#define\ +([A-Z0-9_]+k?)\ +([A-Z0-9_]+\()?([A-Z][A-Z0-9_]+k?)\)? ]]; then
    			key="${BASH_REMATCH[1]}"
    			value="${BASH_REMATCH[3]}"
    		elif [[ $line =~ ^#define\ +([A-Z0-9_]+k?)\ +([A-Z0-9_]+\()?((0x)?[0-9A-Fa-f]+)L?\)? ]]; then
    			key="${BASH_REMATCH[1]}"
    			value="${BASH_REMATCH[3]}"
    			vtype="${BASH_REMATCH[2]}"
    		elif [[ $line =~ ^#define\ +([A-Z0-9_]+k?)\ +\(\(([A-Z]+)\)((0x)?[0-9A-Fa-f]+)L?\) ]]; then
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 15 19:02:39 UTC 2021
    - 2.1K bytes
    - Viewed (0)
  2. test/fixedbugs/issue12577.go

    // Issue 12577: Test that there are no -0 floating-point constants.
    
    package main
    
    import "math"
    
    const (
    	z0 = 0.0
    	z1 = -0.0
    	z2 = -z0
    	z3 = -z2
    )
    
    var (
    	x0 float32 = z0
    	x1 float32 = z1
    	x2 float32 = z2
    	x3 float32 = z3
    
    	y0 float64 = z0
    	y1 float64 = z1
    	y2 float64 = z2
    	y3 float64 = z3
    )
    
    func test32(f float32) {
    	if f != 0 || math.Signbit(float64(f)) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 20 22:11:11 UTC 2015
    - 1011 bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/launch_outlining.mlir

    }
    
    // CHECK: func private @[[LAUNCH_0]]
    // CHECK-SAME: (%[[LAUNCH_0_ARG_0:[a-z0-9]*]]: tensor<?xi32>) -> tensor<?xi32>
    // CHECK: %[[B_OUTPUT:[0-9]*]] = "tf.B"(%[[LAUNCH_0_ARG_0]])
    // CHECK: return %[[B_OUTPUT]]
    
    // CHECK: func private @[[LAUNCH_1]]
    // CHECK-SAME: (%[[LAUNCH_1_ARG_0:[a-z0-9]*]]: tensor<?xi32>, %[[LAUNCH_1_ARG_1:[a-z0-9]*]]: tensor<?xi32>) -> tensor<?xi32>
    // CHECK: %[[E_OUTPUT:[0-9]*]] = "tf.E"(%[[LAUNCH_1_ARG_0]])
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Oct 31 08:59:10 UTC 2023
    - 4.6K bytes
    - Viewed (0)
  4. build-logic-commons/code-quality-rules/src/main/resources/codenarc/codenarc.xml

            </rule-config>
            <rule-config name='FieldName'>
                <property name='finalRegex' value='^[a-z][a-zA-Z0-9]*$'/>
                <property name='staticFinalRegex' value='^logger$|^[A-Z][A-Z_0-9]*$|^serialVersionUID$'/>
            </rule-config>
            <rule-config name='MethodName'>
                <property name='regex' value='^[a-z][\$_a-zA-Z0-9]*$|^.*\s.*$'/>
            </rule-config>
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Wed Dec 09 08:14:05 UTC 2020
    - 2.2K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/amd64error.s

    	// TODO(quasilyte): improve error message (#21860).
    	V4FMADDPS (AX), [Z0-Z4], K1, Z7  // ERROR "invalid instruction"
    	V4FMADDPS (AX), [Z0-Z0], K1, Z7  // ERROR "invalid instruction"
    	// Invalid ranges in REG_LIST (low > high).
    	// TODO(quasilyte): improve error message (#21860).
    	V4FMADDPS (AX), [Z4-Z0], K1, Z7  // ERROR "invalid instruction"
    	V4FMADDPS (AX), [Z1-Z0], K1, Z7  // ERROR "invalid instruction"
    	// Mismatching registers in a range.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jun 14 00:03:57 UTC 2023
    - 8.9K bytes
    - Viewed (0)
  6. src/cmd/vendor/golang.org/x/sys/plan9/mkerrors.sh

    		$2 ~ /^(SCM_SRCRT)$/ {next}
    		$2 ~ /^(MAP_FAILED)$/ {next}
    
    		$2 !~ /^ETH_/ &&
    		$2 !~ /^EPROC_/ &&
    		$2 !~ /^EQUIV_/ &&
    		$2 !~ /^EXPR_/ &&
    		$2 ~ /^E[A-Z0-9_]+$/ ||
    		$2 ~ /^B[0-9_]+$/ ||
    		$2 ~ /^V[A-Z0-9]+$/ ||
    		$2 ~ /^CS[A-Z0-9]/ ||
    		$2 ~ /^I(SIG|CANON|CRNL|EXTEN|MAXBEL|STRIP|UTF8)$/ ||
    		$2 ~ /^IGN/ ||
    		$2 ~ /^IX(ON|ANY|OFF)$/ ||
    		$2 ~ /^IN(LCR|PCK)$/ ||
    		$2 ~ /(^FLU?SH)|(FLU?SH$)/ ||
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 26 00:11:50 UTC 2022
    - 5.9K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tensorflow/tests/cluster_outlining.mlir

    }
    
    // CHECK: func private @[[CLUSTER_0]]
    // CHECK-SAME: (%[[CLUSTER_0_ARG_0:[a-z0-9]*]]: tensor<?xi32>) -> tensor<?xi32>
    // CHECK: %[[B_OUTPUT:[0-9]*]] = "tf.B"(%[[CLUSTER_0_ARG_0]])
    // CHECK: return %[[B_OUTPUT]]
    
    // CHECK: func private @[[CLUSTER_1]]
    // CHECK-SAME: (%[[CLUSTER_1_ARG_0:[a-z0-9]*]]: tensor<?xi32>, %[[CLUSTER_1_ARG_1:[a-z0-9]*]]: tensor<?xi32>) -> tensor<?xi32>
    // CHECK: %[[E_OUTPUT:[0-9]*]] = "tf.E"(%[[CLUSTER_1_ARG_0]])
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Apr 30 21:25:12 UTC 2024
    - 4.8K bytes
    - Viewed (0)
  8. build-logic-commons/code-quality-rules/src/main/resources/codenarc/codenarc-integtests.xml

            </rule-config>
            <rule-config name='FieldName'>
                <property name='finalRegex' value='^[a-z][a-zA-Z0-9]*$'/>
                <property name='staticFinalRegex' value='^logger$|^[A-Z][A-Z_0-9]*$|^serialVersionUID$'/>
            </rule-config>
            <rule-config name='MethodName'>
                <property name='regex' value='^[a-z][\$_a-zA-Z0-9]*$|^.*\s.*$'/>
            </rule-config>
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Wed Dec 09 08:14:05 UTC 2020
    - 2.3K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/gpu_fusion.mlir

    // Since the tf.AddV2 op has two uses, we have a _FusedBatchNormEx without the
    // Relu activation and we only fuse the add.
    // CHECK-NEXT: %[[Y:[a-z0-9]*]], {{.*}}_FusedBatchNormEx
    // CHECK-NEXT: %[[relu:[a-z0-9]*]] ={{.*}}Relu"(%[[Y]]
    // CHECK-NEXT: return %[[relu]]
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 24 05:47:26 UTC 2022
    - 3.6K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/avx512enc/vpclmulqdq_avx512f.s

    	VPCLMULQDQ $97, Z9, Z0, Z24                        // 62437d4844c161 or 6243fd4844c161
    	VPCLMULQDQ $97, Z3, Z0, Z24                        // 62637d4844c361 or 6263fd4844c361
    	VPCLMULQDQ $97, 7(SI)(DI*1), Z0, Z24               // 62637d4844843e0700000061 or 6263fd4844843e0700000061
    	VPCLMULQDQ $97, 15(DX)(BX*8), Z0, Z24              // 62637d484484da0f00000061 or 6263fd484484da0f00000061
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 22 14:57:15 UTC 2018
    - 8.2K bytes
    - Viewed (0)
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