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Results 11 - 20 of 388 for argN (0.09 sec)

  1. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/basic_lstm.mlir

    // Ensure basic_lstm roundtrip exactly
    
    func.func @main(%arg0: tensor<1x384xf32>, %arg1: tensor<1x96xf32>, %arg2: tensor<384x480xf32>, %arg3: tensor<384xf32>, %arg4: tensor<1x96xf32>) -> tensor<1x96xf32> {
    // CHECK-LABEL: @main
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 1.1K bytes
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  2. tensorflow/compiler/mlir/lite/tests/legalize-tf-while.mlir

      %7 = "tf.AddV2"(%arg4, %6) {T = f32, device = ""} : (tensor<*xf32>, tensor<?x?xf32>) -> tensor<*xf32>
      %8 = "tf.AddV2"(%arg0, %cst_2) {T = i32, device = ""} : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32>
      func.return %8, %arg1, %0, %arg3, %7 : tensor<*xi32>, tensor<*xi32>, tensor<*xi32>, tensor<*xf32>, tensor<*xf32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir

    // CHECK-LABEL: func @transpose_resnet_layer
    func.func @transpose_resnet_layer(%arg0: tensor<?x224x224x3xf32>, // input
                                 %arg1: tensor<64xf32>,          // batch_norm args
                                 %arg2: tensor<256xf32>,          // batch_norm args
                                 %arg3: tensor<7x7x3x64xf32>,    // conv filter #0
                                 %arg4: tensor<1x1x64x256xf32>   // conv filter #1
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.3K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/basic_lstm.mlir

    // CHECK-NEXT:  buffer: 10
    // CHECK-NEXT:  } ]
    // CHECK-NEXT:  signature_defs: [ ]
    // CHECK-NEXT:}
    
    ^bb0(%arg0: tensor<1x384xf32>, %arg1: tensor<1x96xf32>, %arg2: tensor<384x480xf32>, %arg3: tensor<384xf32>, %arg4: tensor<1x96xf32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 4.4K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/attributes.mlir

    // CHECK-LABEL: func @quantized_types
    func.func @quantized_types(%arg0: tensor<!tf_type.resource<tensor<1x3x!tf_type.quint8>>>,
                          %arg1: tensor<!tf_type.resource<tensor<1x3x!tf_type.quint16>>>,
                          %arg2: tensor<!tf_type.resource<tensor<1x3x!tf_type.qint8>>>,
                          %arg3: tensor<!tf_type.resource<tensor<1x3x!tf_type.qint16>>>,
                          %arg4: tensor<!tf_type.resource<tensor<1x3x!tf_type.qint32>>>) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 08 00:18:59 UTC 2024
    - 4.8K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/tf_to_quant.mlir

    ^bb0(%arg0: tensor<8xf32>, %arg3: tensor<f32>, %arg4: tensor<f32>):
      %1 = "tf.FakeQuantWithMinMaxVars"(%arg0, %arg3, %arg4) {num_bits = 5, narrow_range = false} : (tensor<8xf32>, tensor<f32>, tensor<f32>) -> tensor<8xf32>
      func.return %1 : tensor<8xf32>
    
    // CHECK: %0 = "tf.FakeQuantWithMinMaxVars"(%arg0, %arg1, %arg2)
    // CHECK: return %0 : tensor<8xf32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9.5K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/arg-retval-attrs.pbtxt

    # CHECK-SAME: attributes {allow_soft_placement = false, tf.entry_function = {control_outputs = "", inputs = "arg0,arg1,arg2", outputs = "ret0,ret1,ret2"}}...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 24 00:18:34 UTC 2023
    - 2.3K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tensorflow/tests/remove_unused_while_results.mlir

    // CHECK:       tf.OpC
    func.func @result_used_in_cond(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> {
      %0:2 = "tf.WhileRegion"(%arg0, %arg1) ({
      ^bb0(%arg2: tensor<*xf32>, %arg3: tensor<*xf32>):
        %1 = "tf.OpA"(%arg2) {is_stateless = true} : (tensor<*xf32>) -> tensor<i1>
        "tf.Yield"(%1) : (tensor<i1>) -> ()
      }, {
      ^bb0(%arg2: tensor<*xf32>, %arg3: tensor<*xf32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Sep 21 20:25:31 UTC 2022
    - 8.5K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/tf_to_quant_4bit.mlir

    ^bb0(%arg0: tensor<8xf32>, %arg3: tensor<f32>, %arg4: tensor<f32>):
      %1 = "tf.FakeQuantWithMinMaxVars"(%arg0, %arg3, %arg4) {num_bits = 3, narrow_range = false} : (tensor<8xf32>, tensor<f32>, tensor<f32>) -> tensor<8xf32>
      func.return %1 : tensor<8xf32>
    
    // CHECK: %0 = "tf.FakeQuantWithMinMaxVars"(%arg0, %arg1, %arg2)
    // CHECK: return %0 : tensor<8xf32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-stablehlo-vhlo.mlir

    func.func @op_with_region_mixed_tfl_shlo_tfl(%arg0: tensor<7x5xf32>, %arg1 : tensor<5xf32>) -> tensor<5xf32> {
      %0 = "stablehlo.reduce"(%arg0, %arg1) ({
      ^bb0(%arg2: tensor<5xf32>, %arg3: tensor<5xf32>):
        // CHECK:      %1 = "tfl.abs"(%arg2) {fused_activation_function = "NONE"} : (tensor<5xf32>) -> tensor<5xf32>
        // CHECK-NEXT: %2 = "vhlo.add_v1"(%1, %arg2) : (tensor<5xf32>, tensor<5xf32>) -> tensor<5xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 07 22:39:35 UTC 2024
    - 5.7K bytes
    - Viewed (0)
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