llvm::SmallVector<Attribute>& results) {
  // If any operand is nullptr returns true for a failure.
  // TODO(b/120678030): remove this constraint if we find operators can be
  // evaluated with some unknown operands.
  if (std::any_of(operands.begin(), operands.end(),
                  [](Attribute operand) { return !operand; })) {

  let description = [{
    cond: The boolean to control whether the first iteration should be
      executed.
    operands: The arguments to the first iteration.
    results: The results of the last iteration. The number and types of results
      excluding the last one are the same as the number and types of operands. The
      last element of results is an I1 value that is false.

  llvm::SmallVector<mlir::Type, 4> operand_types;
  if (options.has_chain) operand_types.push_back(chain_type);
  if (parser.resolveOperands(in_chains, operand_types, loc, result.operands) ||
      parser.resolveOperands(operands, tensor_type, result.operands))
    return mlir::failure();

  if (options.has_chain) result.types.push_back(chain_type);
  result.types.append(num_results, tensor_type);

    Interface for ops potentially have same operands and results scales.
  }];

  let methods = [
    InterfaceMethod<
      [{Returns whether same operands and results scales are required.}],
      "bool", "RequiredSameOperandsAndResultsScale",
      (ins "bool":$sign, "int":$bit_width), [{}], [{return true;}]
    >,
    InterfaceMethod<
      [{Returns whether operands and results must have the same quantized axis.}],

    Example:
      %device_tensor = gpurt.transfer_to_device %cpu_tensor
  }];

  let arguments = (ins TFTensorType);
  let results = (outs TFTensorType);
  let assemblyFormat = "operands attr-dict";
}

// TODO(b/260267885): We may add a device argument when we want to support
// GPU MIG.
def TransferFromDeviceOp: Gpu_Op<"transfer_from_device"> {
  let summary = "Transfer a tensor from device.";

  let arguments = (ins
    Variadic<TFTensorType>,
    StrAttr:$node_def,
    I32Attr:$op_key
  );

  let results = (outs Variadic<TFTensorType>);

  let assemblyFormat = "`(`operands`)` attr-dict `:` functional-type(operands, results)";
}


def ConvertDhtToFallbackTensorOp : FallbackSync_Op<"convert_dht_to_fallback_tensor",
    [CoreRT_TypedAttributeTrait]> {
  let summary = "convert a DHT to a fallback tensor";

  }
}

// Visits all operands of an op where each operand is an output of an Operation
// in the same tf_executor.graph.
void VisitOpOperands(GraphOp graph, Operation* op,
                     llvm::SmallPtrSetImpl<Operation*>* reachable_ops,
                     llvm::SmallVectorImpl<Operation*>* ops_to_visit) {
  for (Value operand : op->getOperands())
    VisitOpOperand(graph, operand, reachable_ops, ops_to_visit);
}

// TODO(fengliuai): supports a configurable accumulator bit width.
template <int Bias, int... Operands>
class AccumulatorUniformScale {
 public:
  template <typename ConcreteType>
  class Impl
      : public QuantizationSpecTraitBase<
            ConcreteType, AccumulatorUniformScale<Bias, Operands...>::Impl> {
   public:
    // Whether the index-th operand is a bias.
    static bool IsBias(int index) { return index == Bias; }

      if (is_op_a && *result_constraint == ValueConstraint::kShape)
        operands.Insert(op->getOperand(0), ValueConstraint::kRank);

      // `test.OpB` converts value constraint to shape constraint.
      if (*result_constraint == ValueConstraint::kValue)
        operands.Insert(op->getOperand(0), ValueConstraint::kShape);
    }

    return success();
  }
};

 public:
  using TensorflowDataflowAnalysis<
      ResourceConstructingOps>::TensorflowDataflowAnalysis;
  void visitOperation(Operation *op, ArrayRef<const StateT *> operands,
                      ArrayRef<StateT *> results) override {
    if (ForwardThroughTFOperation(op, operands, results)) return;
    setAllToEntryStates(results);
  }
  ~ResourceDataflowAnalysis() override = default;
};

class IsCompositeDataflowAnalysis