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Results 31 - 40 of 241 for aloop (0.12 sec)
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src/internal/bytealg/equal_loong64.s
TEXT runtime·memequal<ABIInternal>(SB),NOSPLIT|NOFRAME,$0-25 BEQ R4, R5, eq ADDV R4, R6, R7 PCALIGN $16 loop: BNE R4, R7, test MOVV $1, R4 RET test: MOVBU (R4), R9 ADDV $1, R4 MOVBU (R5), R10 ADDV $1, R5 BEQ R9, R10, loop MOVB R0, R4 RET eq: MOVV $1, R4 RET // memequal_varlen(a, b unsafe.Pointer) bool
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 875 bytes - Viewed (0) -
src/cmd/compile/internal/ssa/regalloc_test.go
Goto("loop"), ), Bloc("loop", Valu("memphi", OpPhi, types.TypeMem, 0, nil, "mem", "call"), Valu("call", OpAMD64CALLstatic, types.TypeMem, 0, AuxCallLSym("_"), "memphi"), Valu("test", OpAMD64CMPBconst, types.TypeFlags, 0, nil, "cond"), Eq("test", "next", "exit"), ), Bloc("next", Goto("loop"), ), Bloc("exit",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 08 19:09:14 UTC 2023 - 6.3K bytes - Viewed (0) -
src/math/big/arith_arm.s
// first word MOVW.P 4(R2), R6 MOVW R6>>R3, R7 MOVW R6<<R4, R6 MOVW R6, c+28(FP) B E6 // word loop L6: MOVW.P 4(R2), R6 ORR R6<<R4, R7 MOVW.P R7, 4(R1) MOVW R6>>R3, R7 E6: TEQ R1, R5 BNE L6 MOVW R7, 0(R1) RET Y6: // copy loop, because shift 0 == shift 32 MOVW.P 4(R2), R6 MOVW.P R6, 4(R1) TEQ R1, R5 BNE Y6 X6: MOVW $0, R1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 4K bytes - Viewed (0) -
pkg/controller/volume/attachdetach/config/types.go
// Reconciler runs a periodic loop to reconcile the desired state of the with // the actual state of the world by triggering attach detach operations. // This flag enables or disables reconcile. Is false by default, and thus enabled. DisableAttachDetachReconcilerSync bool // ReconcilerSyncLoopPeriod is the amount of time the reconciler sync states loop // wait between successive executions. Is set to 60 sec by default.
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Thu Feb 22 18:31:52 UTC 2024 - 1.4K bytes - Viewed (0) -
src/math/big/arith_amd64.s
MOVQ x+24(FP), R8 MOVQ y+48(FP), R9 MOVQ z+0(FP), R10 MOVQ $0, CX // c = 0 MOVQ $0, SI // i = 0 // s/JL/JMP/ below to disable the unrolled loop SUBQ $4, DI // n -= 4 JL V1 // if n < 0 goto V1 U1: // n >= 0 // regular loop body unrolled 4x ADDQ CX, CX // restore CF MOVQ 0(R8)(SI*8), R11 MOVQ 8(R8)(SI*8), R12 MOVQ 16(R8)(SI*8), R13 MOVQ 24(R8)(SI*8), R14 ADCQ 0(R9)(SI*8), R11
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 9.1K bytes - Viewed (0) -
test/fixedbugs/issue24491a.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 17 19:36:58 UTC 2023 - 1.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalization_op_config_test.cc
} TEST_F(LegalizationOpConfigTest, ExpectsTrueForTF2XLATypeID) { EXPECT_TRUE(HasTf2XlaFallback(TypeID::get<TF::AllOp>())); EXPECT_TRUE(IsOpAllowedTf2xlaPreferred(TypeID::get<TF::AllOp>())); EXPECT_FALSE(IsTypeLegalizedWithMlir(TypeID::get<TF::AllOp>())); } TEST_F(LegalizationOpConfigTest, ChecksDynamicPadderOps) { EXPECT_TRUE(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 30 03:31:01 UTC 2024 - 8.4K bytes - Viewed (0) -
docs/de/docs/advanced/async-tests.md
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Sat Mar 30 20:25:57 UTC 2024 - 4.4K bytes - Viewed (0) -
docs/en/docs/advanced/async-tests.md
!!! tip
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Sat Jan 13 12:07:15 UTC 2024 - 3.9K bytes - Viewed (0) -
src/runtime/time_windows_386.s
//go:build !faketime #include "go_asm.h" #include "textflag.h" #include "time_windows.h" TEXT time·now(SB),NOSPLIT,$0-20 loop: MOVL (_INTERRUPT_TIME+time_hi1), AX MOVL (_INTERRUPT_TIME+time_lo), CX MOVL (_INTERRUPT_TIME+time_hi2), DI CMPL AX, DI JNE loop // w = DI:CX // multiply by 100 MOVL $100, AX MULL CX IMULL $100, DI ADDL DI, DX // w*100 = DX:AX MOVL AX, mono+12(FP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 07 17:19:45 UTC 2023 - 1.7K bytes - Viewed (0)