"VMULESW",
	"VMULOSW",
	"VMULEUW",
	"VMULOUW",
	"VMULUWM",
	"VPMSUM",
	"VPMSUMB",
	"VPMSUMH",
	"VPMSUMW",
	"VPMSUMD",
	"VMSUMUDM",
	"VR",
	"VRLB",
	"VRLH",
	"VRLW",
	"VRLD",
	"VS",
	"VSLB",
	"VSLH",
	"VSLW",
	"VSL",
	"VSLO",
	"VSRB",
	"VSRH",
	"VSRW",
	"VSR",
	"VSRO",
	"VSLD",
	"VSRD",
	"VSA",
	"VSRAB",
	"VSRAH",
	"VSRAW",

	VPMSUMD V1, V2, V3              // 106114c8
	VMSUMUDM V1, V2, V3, V4         // 108110e3
	VRLB V1, V2, V3                 // 10611004
	VRLH V1, V2, V3                 // 10611044
	VRLW V1, V2, V3                 // 10611084
	VRLD V1, V2, V3                 // 106110c4
	VSLB V1, V2, V3                 // 10611104
	VSLH V1, V2, V3                 // 10611144
	VSLW V1, V2, V3                 // 10611184

	VRFIM:          "vrfim",
	VRFIN:          "vrfin",
	VRFIP:          "vrfip",
	VRFIZ:          "vrfiz",
	VRLB:           "vrlb",
	VRLH:           "vrlh",
	VRLW:           "vrlw",
	VRSQRTEFP:      "vrsqrtefp",
	VSEL:           "vsel",
	VSL:            "vsl",
	VSLB:           "vslb",
	VSLDOI:         "vsldoi",
	VSLH:           "vslh",
	VSLO:           "vslo",
	VSLW:           "vslw",

		case AVPMSUM: /* vpmsumb, vpmsumh, vpmsumw, vpmsumd */
			opset(AVPMSUMB, r0)
			opset(AVPMSUMH, r0)
			opset(AVPMSUMW, r0)
			opset(AVPMSUMD, r0)

		case AVR: /* vrlb, vrlh, vrlw, vrld */
			opset(AVRLB, r0)
			opset(AVRLH, r0)
			opset(AVRLW, r0)
			opset(AVRLD, r0)

		case AVS: /* vs[l,r], vs[l,r]o, vs[l,r]b, vs[l,r]h, vs[l,r]w, vs[l,r]d */
			opset(AVSLB, r0)
			opset(AVSLH, r0)

	"VREPB",
	"VREPH",
	"VREPF",
	"VREPG",
	"VREPI",
	"VREPIB",
	"VREPIH",
	"VREPIF",
	"VREPIG",
	"VSCEF",
	"VSCEG",
	"VSEL",
	"VSL",
	"VSLB",
	"VSLDB",
	"VSRA",
	"VSRAB",
	"VSRL",
	"VSRLB",
	"VSEG",
	"VSEGB",
	"VSEGH",
	"VSEGF",
	"VST",
	"VSTEH",
	"VSTEF",
	"VSTEG",
	"VSTEB",
	"VSTM",
	"VSTL",
	"VSTRC",
	"VSTRCB",
	"VSTRCH",

	VADDUWM V8, V12, V8
	VADDUWM V9, V13, V9
	VADDUWM V10, V14, V10
	VADDUWM V11, V15, V11

	VXOR V4, V8, V4
	VXOR V5, V9, V5
	VXOR V6, V10, V6
	VXOR V7, V11, V7

	VRLW V4, V28, V4
	VRLW V5, V28, V5
	VRLW V6, V28, V6
	VRLW V7, V28, V7

	VADDUWM V0, V4, V0
	VADDUWM V1, V5, V1
	VADDUWM V2, V6, V2
	VADDUWM V3, V7, V3

	VPERMXOR V12, V0, V20, V12
	VPERMXOR V13, V1, V20, V13

	out[0] = o0
}

// vcmpuq BF,VRA,VRB
func type_vcmpuq(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
	o0 := GenOpcodes[p.As-AXXSETACCZ]
	o0 |= uint32(p.To.Reg&0x7) << 23    // BF
	o0 |= uint32(p.From.Reg&0x1f) << 16 // VRA
	o0 |= uint32(p.Reg&0x1f) << 11      // VRB
	out[0] = o0
}

// vcntmbw RT,VRB,MP
func type_vcntmbw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {

ABCDEFGHIJKLMNOPQRSTUVXxyz!"#¤%&/?"...

	// Process remaining data chunks
	CMP     R4 ,$16
	BGE     fold_16bytes_loop

final_fold:
	VLEIB   $7, $0x40, V9
	VSRLB   V9, CONST_R4R3, V0
	VLEIG   $0, $1, V0

	VGFMG   V0, V1, V1

	VLEIB   $7, $0x20, V9         // Shift by words
	VSRLB   V9, V1, V2            // Store remaining bits in V2
	VUPLLF  V1, V1                // Split rightmost doubleword

	MOVD counter+64(FP), R7    // R7=counter

	// load BSWAP and J0
	VLM (R1), BSWAP, J0

	// setup
	MOVD  $95, R0
	VLM   (R5), KEY0, KEY1
	VLL   R0, (R6), NONCE
	VZERO M0
	VLEIB $7, $32, M0
	VSRLB M0, NONCE, NONCE

	// initialize counter values
	VLREPF (R7), CTR
	VZERO  INC
	VLEIF  $1, $1, INC
	VLEIF  $2, $2, INC
	VLEIF  $3, $3, INC
	VAF    INC, CTR, CTR
	VREPIF $4, INC

chacha: