r := int(p.Reg)
		if r == obj.REG_NONE {
			r = int(p.To.Reg)
		}
		o1 |= (uint32(p.From.Reg&31) << 16) | (uint32(r&31) << 5) | uint32(p.To.Reg&31)

	case 10: /* brk/hvc/.../svc [$con] */
		o1 = c.opimm(p, p.As)

		if p.From.Type != obj.TYPE_NONE {
			o1 |= uint32((p.From.Offset & 0xffff) << 5)
		}

	case 11: /* dword */
		c.aclass(&p.To)

		o1 = uint32(c.instoffset)

	// LDRSB <Xt>, [<Xn|SP>{, #<simm>}]!
	{0xffe00c00, 0x38800c00, LDRSB, instArgs{arg_Xt, arg_Xns_mem_wb_imm9_1_signed}, nil},
	// LDRSB <Wt>, [<Xn|SP>{, #<pimm>}]
	{0xffc00000, 0x39c00000, LDRSB, instArgs{arg_Wt, arg_Xns_mem_optional_imm12_1_unsigned}, nil},
	// LDRSB <Xt>, [<Xn|SP>{, #<pimm>}]
	{0xffc00000, 0x39800000, LDRSB, instArgs{arg_Xt, arg_Xns_mem_optional_imm12_1_unsigned}, nil},
	// LDRSB <Wt>, [<Xn|SP>, (<Wm>|<Xm>) {, <extend> {<amount>}}]

{"Name":"LDR (immediate, SIMD&FP)","Bits":"01:2|1|1|1|1|0|1|01:2|imm12:12|Rn:5|Rt:5","Arch":"Unsigned offset 16-bit variant","Syntax":"LDR <Ht>, [<Xn|SP>{, #<pimm>}]","Code":"","Alias":""},
{"Name":"LDR (immediate, SIMD&FP)","Bits":"10:2|1|1|1|1|0|1|01:2|imm12:12|Rn:5|Rt:5","Arch":"Unsigned offset 32-bit variant","Syntax":"LDR <St>, [<Xn|SP>{, #<pimm>}]","Code":"","Alias":""},