BLT     checkbytes
#ifdef GOPPC64_power10
	ADD	$8, BYTES
	SLD	$56, BYTES, TMP
	LXVL	SRC, TMP, V0
	STXVL	V0, TGT, TMP
	RET
#endif

	MOVD    0(SRC), TMP
	ADD	$8, SRC
	MOVD    TMP, 0(TGT)
	ADD     $8, TGT
checkbytes:
	BC	12, 14, LR		// BEQ lr
#ifdef GOPPC64_power10
	SLD	$56, BYTES, TMP
	LXVL	SRC, TMP, V0
	STXVL	V0, TGT, TMP
	RET
#endif
lt8:	// Move word if possible

	STXVD2X	VS32, (R3)(R8)
	ADD	$16, R8
	ADD	$-16, R6
small:
	CMP	R6, $0
	BC	12,2,LR		// BEQLR
xor8:
#ifdef GOPPC64_power10
	SLD	$56,R6,R17
	ADD	R4,R8,R18
	ADD	R5,R8,R19
	ADD	R3,R8,R20
	LXVL	R18,R17,V0
	LXVL	R19,R17,V1
	VXOR	V0,V1,V1
	STXVL	V1,R20,R17
	RET
#else
	CMP	R6, $8
	BLT	xor4
	// Case for 8 ≤ n < 16 bytes
	MOVD	(R4)(R8), R14   // R14 = a[i,...,i+7]

	"VNCIPHER",
	"VNCIPHERLAST",
	"VSBOX",
	"VSHASIGMA",
	"VSHASIGMAW",
	"VSHASIGMAD",
	"VMRGEW",
	"VMRGOW",
	"VCLZLSBB",
	"VCTZLSBB",
	"LXV",
	"LXVL",
	"LXVLL",
	"LXVD2X",
	"LXVW4X",
	"LXVH8X",
	"LXVB16X",
	"LXVX",
	"LXVDSX",
	"STXV",
	"STXVL",
	"STXVLL",
	"STXVD2X",
	"STXVW4X",
	"STXVH8X",
	"STXVB16X",
	"STXVX",
	"LXSDX",
	"STXSDX",

	ADD	$-16, R9
	ADD	$-16, R10
	LXVD2X	(R9+R0), V0
	LXVD2X	(R10+R0), V1
	VCMPEQUBCC	V0, V1, V2
	ISEL	CR6LT, R5, R0, R3
	RET

check0_16:
#ifdef GOPPC64_power10
	SLD	$56, R5, R7
	LXVL	R8, R7, V0
	LXVL	R4, R7, V1
	VCMPEQUDCC	V0, V1, V2
	ISEL	CR6LT, R11, R0, R3
	RET
#else
	CMP	R5, $8
	BLT	check0_7
	// Load sX[0:7] and compare.
	MOVD	(R8), R6
	MOVD	(R4), R7
	CMP	R6, R7

		}
		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]

	case LXVX, LXVD2X, LXVW4X, LXVH8X, LXVB16X, LVX, LVXL, LVSR, LVSL, LVEBX, LVEHX, LVEWX, LXSDX, LXSIWAX:
		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]

	case LXV:
		return op + " " + args[1] + "," + args[0]

	case LXVL, LXVLL:
		return op + " " + args[1] + "," + args[2] + "," + args[0]

	case DCBT, DCBTST, DCBZ, DCBST, ICBI:

	LXVW4X (R3), VS1                // 7c201e18
	LXV 16(R3), VS1                 // f4230011
	LXV (R3), VS1                   // f4230001
	LXV 16(R3), VS33                // f4230019
	LXV (R3), VS33                  // f4230009
	LXV 16(R3), V1                  // f4230019
	LXV (R3), V1                    // f4230009
	LXVL R3, R4, VS1                // 7c23221a
	LXVLL R3, R4, VS1               // 7c23225a

	LXSD:           "lxsd",
	LXSIBZX:        "lxsibzx",
	LXSIHZX:        "lxsihzx",
	LXSSP:          "lxssp",
	LXV:            "lxv",
	LXVB16X:        "lxvb16x",
	LXVH8X:         "lxvh8x",
	LXVL:           "lxvl",
	LXVLL:          "lxvll",
	LXVWSX:         "lxvwsx",
	LXVX:           "lxvx",
	MADDHD:         "maddhd",
	MADDHDU:        "maddhdu",
	MADDLD:         "maddld",
	MCRXRX:         "mcrxrx",

		case ALXVD2X: /* lxvd2x, lxvdsx, lxvw4x, lxvh8x, lxvb16x */
			opset(ALXVDSX, r0)
			opset(ALXVW4X, r0)
			opset(ALXVH8X, r0)
			opset(ALXVB16X, r0)

		case ALXV: /* lxv */
			opset(ALXV, r0)

		case ALXVL: /* lxvl, lxvll, lxvx */
			opset(ALXVLL, r0)
			opset(ALXVX, r0)

		case ASTXVD2X: /* stxvd2x, stxvdsx, stxvw4x, stxvh8x, stxvb16x */
			opset(ASTXVW4X, r0)
			opset(ASTXVH8X, r0)

tail:	// Count the last 0 - 31 bytes.
	CMP	R4, $16
	BLE	small_tail_p10
	LXV	0(R3), V0
	VCMPEQUB V0, V1, V0
	VCNTMBB	V0, $1, R14	// Sum the value of bit 0 of each byte of the compare into R14.
	SRD	$56, R14, R14	// The result of VCNTMBB is shifted. Unshift it.
	ADD	R14, R18, R18
	ADD	$16, R3, R3
	ANDCC	$15, R4, R4

small_tail_p10:
	SLD	$56, R4, R6
	LXVLL	R3, R6, V0
	VCMPEQUB V0, V1, V0

	var s [32]byte
	// ppc64x:-".*memmove"
	// ppc64x/power8:"LXVD2X",-"ADD",-"BC"
	// ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC"
	copy(s[:], x[:32])
	runtime.KeepAlive(&s)
}

func moveDisjointStack64() {
	var s [96]byte
	// ppc64x:-".*memmove"
	// ppc64x/power8:"LXVD2X","ADD","BC"
	// ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC"
	copy(s[:], x[:96])
	runtime.KeepAlive(&s)
}

func moveDisjointStack() {