package runtime

import (
	"internal/cpu"
)

var useAVXmemmove bool

func init() {
	// Let's remove stepping and reserved fields
	processor := processorVersionInfo & 0x0FFF3FF0

	isIntelBridgeFamily := isIntel &&
		processor == 0x206A0 ||
		processor == 0x206D0 ||
		processor == 0x306A0 ||
		processor == 0x306E0

	useAVXmemmove = cpu.X86.HasAVX && !isIntelBridgeFamily

                val extension = when {
                    BuildEnvironment.isWindows -> "windows.zip"
                    BuildEnvironment.isMacOsX && BuildEnvironment.isIntel -> "mac.zip"
                    BuildEnvironment.isMacOsX && !BuildEnvironment.isIntel -> "mac_arm.zip"
                    BuildEnvironment.isLinux -> "linux.tar.gz"
                    else -> throw IllegalStateException("Unsupported OS: ${OperatingSystem.current()}")

    val javaVersion = JavaVersion.current()
    val isWindows = OperatingSystem.current().isWindows
    val isLinux = OperatingSystem.current().isLinux
    val isMacOsX = OperatingSystem.current().isMacOsX
    val isIntel: Boolean = architecture == "x86_64" || architecture == "x86"
    val isSlowInternetConnection
        get() = System.getProperty("slow.internet.connection", "false")!!.toBoolean()
    val agentNum: Int
        get() {

	// Information about what cpu features are available.
	// Packages outside the runtime should not use these
	// as they are not an external api.
	// Set on startup in asm_{386,amd64}.s
	processorVersionInfo uint32
	isIntel              bool
)

// set by cmd/link on arm systems
// accessed using linkname by internal/runtime/atomic.
//
// goarm should be an internal detail,

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package x86asm

import (
	"fmt"
	"strings"
)

// IntelSyntax returns the Intel assembler syntax for the instruction, as defined by Intel's XED tool.
func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string {
	if symname == nil {
		symname = func(uint64) (string, uint64) { return "", 0 }
	}

	extendedResources1 := map[string]int64{
		"intel.com/foo": 4,
		"intel.com/bar": 8,
	}
	extendedResources2 := map[string]int64{
		"intel.com/foo": 8,
		"intel.com/bar": 4,
	}

	extendedResourcePod1 := map[v1.ResourceName]string{
		"intel.com/foo": "2",
		"intel.com/bar": "2",
	}
	extendedResourcePod2 := map[v1.ResourceName]string{
		"intel.com/foo": "4",
		"intel.com/bar": "2",
	}

    /**
     * {@inheritDoc}
     */
    @Override
    @Input
    public abstract String getName();

    /**
     * The intel x86 32-bit architecture
     */
    public static final String X86 = "x86";

    /**
     * The intel x86 64-bit architecture
     */
    public static final String X86_64 = "x86-64";

    /**
     * The ARM 64-bit architecture
     *
     * @since 7.6

		nonZero          bool
	}{
		{
			"extended_resource_not_found",
			v1.ResourceList{},
			v1.ResourceName("intel.com/foo"),
			0,
			true,
		},
		{
			"extended_resource_found",
			v1.ResourceList{
				v1.ResourceName("intel.com/foo"): resource.MustParse("4"),
			},
			v1.ResourceName("intel.com/foo"),
			4,
			true,
		},
		{
			"cpu_not_found",
			v1.ResourceList{},
			v1.ResourceCPU,

 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */


Some files from Intel carry the following license:

# Copyright (c) 2012, Intel Corporation
#
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are

 *         <th>32-bit names</th>
 *         <th>64-bit names</th>
 *     </tr>
 *     <tr>
 *         <td>Intel x86</td>
 *         <td>"x86", "i386", "ia-32", "i686"</td>
 *         <td>"x86_64", "amd64", "x64", "x86-64"</td>
 *     </tr>
 *     <tr>
 *         <td>Intel Itanium</td>
 *         <td>N/A</td>
 *         <td>"ia-64", "ia64"</td>
 *     </tr>
 *     <tr>
 *         <td>Power PC</td>