- Sort Score
- Result 10 results
- Languages All
Results 1 - 10 of 104 for cmp4 (0.1 sec)
-
src/internal/bytealg/compare_ppc64x.s
RET PCALIGN $16 cmp4: // 4 - 7B CMP R9,$4 BLT cmp2 ANDCC $3,R9,R9 _LWBEX (R0)(R5),R10 _LWBEX (R0)(R6),R11 _LWBEX (R9)(R5),R12 _LWBEX (R9)(R6),R14 RLDIMI $32,R10,$0,R12 RLDIMI $32,R11,$0,R14 CMPU R12,R14 BR cmp0 PCALIGN $16 cmp2: // 2 - 3B CMP R9,$2 BLT cmp1 ANDCC $1,R9,R9 _LHBEX (R0)(R5),R10 _LHBEX (R0)(R6),R11 _LHBEX (R9)(R5),R12
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 28 17:33:20 UTC 2023 - 6.7K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_ppc64x.s
RET cmp4: // Length 4 - 7 CMPU R4,$4 BLT cmp2 MOVD $-4,R11 ADD $-4,R4,R4 _LWBEX (R0)(R3),R10 _LWBEX (R11)(R9),R11 CMPB R10,R5,R10 CMPB R11,R5,R11 CNTLZW R10,R10 CNTLZW R11,R11 CMPU R10,$32 CMPU R11,$32,CR1 SRD $3,R10,R3 SRD $3,R11,R11 BNE found ADD R4,R11,R4 MOVD $-1,R3 ISEL CR1EQ,R3,R4,R3 RET cmp2: // Length 2 - 3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:10:29 UTC 2023 - 6.3K bytes - Viewed (0) -
test/codegen/comparisons.go
// s390x:`MOVHBR\t\(.*\), [R]`,`CMPW\t.*, [$]` return s == "xx" } func CompareString2(s string) bool { // amd64:`CMPL\t\(.*\), [$]` // arm64:`MOVWU\t\(.*\), [R]`,`CMPW\t.*, [R]` // ppc64le:`MOVWZ\t\(.*\), [R]`,`CMPW\t.*, [R]` // s390x:`MOVWBR\t\(.*\), [R]`,`CMPW\t.*, [$]` return s == "xxxx" } func CompareString3(s string) bool { // amd64:`CMPQ\t\(.*\), [A-Z]` // arm64:-`CMPW\t`
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 19 16:31:02 UTC 2024 - 15.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK-DAG: [[CMP3:%.+]] = chlo.broadcast_compare %arg1, [[ZEROS2]] {comparison_direction = #chlo<comparison_direction LT>} // CHECK-DAG: [[CMP4:%.+]] = chlo.broadcast_compare [[CMP2]], [[CMP3]] {broadcast_dimensions = array<i64: 1>, comparison_direction = #chlo<comparison_direction NE>} // CHECK-DAG: [[AND:%.+]] = chlo.broadcast_and [[CMP1]], [[CMP4]] // CHECK-DAG: [[ONES:%.+]] = mhlo.constant dense<1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/shortcircuit_test.go
Goto("b1")), Bloc("b1", Valu("cmp1", OpLess64, c.config.Types.Bool, 0, nil, "arg1", "arg2"), If("cmp1", "b2", "b3")), Bloc("b2", Valu("cmp2", OpLess64, c.config.Types.Bool, 0, nil, "arg2", "arg3"), Goto("b3")), Bloc("b3", Valu("phi2", OpPhi, c.config.Types.Bool, 0, nil, "cmp1", "cmp2"), If("phi2", "b4", "b5")), Bloc("b4", Valu("cmp3", OpLess64, c.config.Types.Bool, 0, nil, "arg3", "arg1"),
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 09 23:01:51 UTC 2017 - 1.3K bytes - Viewed (0) -
test/codegen/fuse.go
func si1c(c <-chan int64) { // amd64:"CMPQ\t.+, [$]256" // s390x:"CLGIJ\t[$]12, R[0-9]+, [$]255" for x := <-c; x >= 0 && x < 256; x = <-c { } } func si2c(c <-chan int32) { // amd64:"CMPL\t.+, [$]256" // s390x:"CLIJ\t[$]12, R[0-9]+, [$]255" for x := <-c; x >= 0 && x < 256; x = <-c { } } func si3c(c <-chan int16) { // amd64:"CMPW\t.+, [$]256" // s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 03 14:30:26 UTC 2020 - 4.8K bytes - Viewed (0) -
test/codegen/memops.go
var x32 [2]uint32 var x64 [2]uint64 func compMem1() int { // amd64:`CMPB\tcommand-line-arguments.x\+1\(SB\), [$]0` if x[1] { return 1 } // amd64:`CMPB\tcommand-line-arguments.x8\+1\(SB\), [$]7` if x8[1] == 7 { return 1 } // amd64:`CMPW\tcommand-line-arguments.x16\+2\(SB\), [$]7` if x16[1] == 7 { return 1 } // amd64:`CMPL\tcommand-line-arguments.x32\+4\(SB\), [$]7` if x32[1] == 7 { return 1 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 12.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64splitload.rules
(CMP(Q|L|W|B)loadidx1 {sym} [off] ptr idx x mem) => (CMP(Q|L|W|B) (MOV(Q|L|W|B)loadidx1 {sym} [off] ptr idx mem) x) (CMPQloadidx8 {sym} [off] ptr idx x mem) => (CMPQ (MOVQloadidx8 {sym} [off] ptr idx mem) x) (CMPLloadidx4 {sym} [off] ptr idx x mem) => (CMPL (MOVLloadidx4 {sym} [off] ptr idx mem) x) (CMPWloadidx2 {sym} [off] ptr idx x mem) => (CMPW (MOVWloadidx2 {sym} [off] ptr idx mem) x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 3.4K bytes - Viewed (0) -
src/internal/bytealg/equal_amd64.s
// b in DI // count in BX // Output: // result in AX TEXT memeqbody<>(SB),NOSPLIT,$0-0 CMPQ BX, $8 JB small CMPQ BX, $64 JB bigloop #ifndef hasAVX2 CMPB internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1 JE hugeloop_avx2 // 64 bytes at a time using xmm registers PCALIGN $16 hugeloop: CMPQ BX, $64 JB bigloop MOVOU (SI), X0 MOVOU (DI), X1 MOVOU 16(SI), X2 MOVOU 16(DI), X3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 17 16:34:40 UTC 2023 - 2.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/armv6.s
LDREXD (R11), R12 // 9fcfbbe1 STREX R3, (R4), R5 // STREX (R4), R3, R5 // 935f84e1 STREXD R8, (R9), g // STREXD (R9), R8, g // 98afa9e1 CMPF F8, F9 // c89ab4ee10faf1ee CMPD.CS F4, F5 // c45bb42e10faf12e CMPF.VS F7 // c07ab56e10faf16e CMPD F6 // c06bb5ee10faf1ee MOVW R4, F8 // 104b08ee MOVW F4, R8 // 108b14ee
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 21 16:30:51 UTC 2017 - 4.6K bytes - Viewed (0)