//
// RET
//
//	LRETRN	comma // asm doesn't support the trailing comma.
//	{
//		outcode(int($1), &nullgen, 0, &nullgen);
//	}
	SYSCALL
	BEQ	R1, 2(PC)
	RET


// More JMP/JAL cases, and canonical names JMP, CALL.

	JAL	foo(SB) // CALL foo(SB)
	BEQ	R1, 2(PC)
	JMP	foo(SB)
	CALL	foo(SB)
	RET	foo(SB)

	// unary operation
	NEGW	R1, R2 // 00011023
	NEGV	R1, R2 // 0001102f

	VGATHERQPD 640(R15)(Z20*2), K6, Z10 // 6252fd4693546750
	VGATHERQPD 960(R15)(Z10*2), K6, Z20 // 6282fd4e93645778
	VGATHERQPD 1280(R15)(Z0*2), K6, Z10 // 6252fd4e93944700050000
	// EVEX: corner cases for High-16 registers.
	VADDPD X31, X16, X15          // 6211fd0058ff
	VADDPD X23, X15, X16          // 62a1850858c7
	VADDPD Y31, Y16, Y15          // 6211fd2058ff
	VADDPD Y23, Y15, Y16          // 62a1852858c7

// Copyright 2017 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

// The cases are auto-generated by disassembler.
// The uncommented cases means they can be handled by assembler
// and they are consistent with disassembler decoding.
// TODO means they cannot be handled by current assembler.

#include "../../../../../runtime/textflag.h"

one:
	MOVL $0, R15
	JMP two

// Ensure 3-arg instructions get GOT-rewritten without errors.
// See issue 58735.
TEXT ·a13(SB), 0, $0-0
	MULXQ runtime·writeBarrier(SB), AX, CX
	RET

// Various special cases in the use-R15-after-global-access-when-dynlinking check.
// See issue 58632.
TEXT ·a14(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0

	//
	// RET
	//
	//	LRETRN	comma // asm doesn't support the trailing comma.
	//	{
	//		outcode(int($1), &nullgen, 0, &nullgen);
	//	}
	SYSCALL
	BEQ	R1, 2(PC)
	RET


	// More JMP/JAL cases, and canonical names JMP, CALL.

	JAL	foo(SB)	// CALL foo(SB)
	BEQ	R1, 2(PC)
	JMP	foo(SB)
	CALL	foo(SB)
	RET	foo(SB)

	// unary operation
	NEGW	R1, R2 // 00011023
	CLZ	R1, R2 // 70221020

// available in cmd/internal/obj/ppc64/asm9.go with
// their valid instruction encodings.

#include "../../../../../runtime/textflag.h"

// In case of index mode instructions, usage of
// (Rx)(R0) is equivalent to (Rx+R0)
// In case of base+displacement mode instructions if
// the offset is 0, usage of (Rx) is equivalent to 0(Rx)
TEXT asmtest(SB),DUPOK|NOSPLIT,$0
	// move constants

//	}
	PLD	(R1)
	PLD	4(R1)

//
// RET
//
//	LTYPEA cond
//	{
//		outcode($1, $2, &nullgen, 0, &nullgen);
//	}
	BEQ	2(PC)
	RET

// More B/BL cases, and canonical names JMP, CALL.

	BEQ	2(PC)
	B	foo(SB) // JMP foo(SB)
	BL	foo(SB) // CALL foo(SB)
	BEQ	2(PC)
	JMP	foo(SB)
	CALL	foo(SB)

// CMPF and CMPD are special.
	CMPF F1, F2

	CASPW	(R6, R7), (R8), (R4, R5)             // 047d2608
	CASPD	(R2, R3), (R2), (R8, R9)             // 487c2248

// RET
	RET
	RET	foo(SB)

// B/BL/B.cond cases, and canonical names JMP, CALL.
	BL	1(PC)      // CALL 1(PC)
	BL	(R2)       // CALL (R2)
	BL	foo(SB)    // CALL foo(SB)
	BL	bar<>(SB)  // CALL bar<>(SB)
	B	foo(SB)    // JMP foo(SB)
	BEQ	1(PC)
	BEQ	2(PC)

	// TODO(quasilyte): improve error message (#21860).
	// "invalid VSIB address (missing vector index)"
	VPGATHERQQ Y2, (BP), Y1         // ERROR "invalid instruction"
	// AVX2GATHER mask/index/dest #UD cases.
	VPGATHERQQ Y2, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
	VPGATHERQQ Y2, (BP)(X2*2), Y7   // ERROR "mask, index, and destination registers should be distinct"

	// CALL and JMP to symbol are encoded as JAL (using LR or ZERO
	// respectively), with a R_RISCV_JAL relocation. The linker resolves
	// the real address and updates the immediate, using a trampoline in
	// the case where the address is not directly reachable.
	CALL	asmtest(SB)				// ef000000
	JMP	asmtest(SB)				// 6f000000

	// Branch pseudo-instructions
	BEQZ	X5, 2(PC)				// 63840200
	BGEZ	X5, 2(PC)				// 63d40200