{0xffe08000, 0x48408000, LDAXRH, instArgs{arg_Wt, arg_Xns_mem}, nil},
	// LDNP <Wt>, <Wt2>, [<Xn|SP>{, #<imm>}]
	{0xffc00000, 0x28400000, LDNP, instArgs{arg_Wt, arg_Wt2, arg_Xns_mem_optional_imm7_4_signed}, nil},
	// LDNP <Xt>, <Xt2>, [<Xn|SP>{, #<imm_1>}]
	{0xffc00000, 0xa8400000, LDNP, instArgs{arg_Xt, arg_Xt2, arg_Xns_mem_optional_imm7_8_signed}, nil},
	// LDP <Wt>, <Wt2>, [<Xn|SP>], #<imm_1>

{"Name":"LDNP","Bits":"10:2|1|0|1|0|0|0|0|1|imm7:7|Rt2:5|Rn:5|Rt:5","Arch":"64-bit variant","Syntax":"LDNP <Xt1>, <Xt2>, [<Xn|SP>{, #<imm>}]","Code":"","Alias":""},
{"Name":"LDP","Bits":"00:2|1|0|1|0|0|0|1|1|imm7:7|Rt2:5|Rn:5|Rt:5","Arch":"Post-index 32-bit variant","Syntax":"LDP <Wt1>, <Wt2>, [<Xn|SP>], #<imm>","Code":"","Alias":""},