polyMulStage3_AVX2
	VMOVDQA  CC3, tmpStoreAVX2
	VPSLLD   $12, BB0, CC3; VPSRLD $20, BB0, BB0; VPXOR CC3, BB0, BB0
	VPSLLD   $12, BB1, CC3; VPSRLD $20, BB1, BB1; VPXOR CC3, BB1, BB1
	VPSLLD   $12, BB2, CC3; VPSRLD $20, BB2, BB2; VPXOR CC3, BB2, BB2
	VPSLLD   $12, BB3, CC3; VPSRLD $20, BB3, BB3; VPXOR CC3, BB3, BB3
	VMOVDQA  tmpStoreAVX2, CC3
	polyMulReduceStage

	VPSLLD (CX), Y5, K1, Y3                            // 62f15529f219
	VPSLLD 99(R15), Y5, K1, Y3                         // 62d15529f29f63000000
	VPSLLD X0, Z18, K2, Z11                            // 62716d42f2d8
	VPSLLD 99(R15)(R15*2), Z18, K2, Z11                // 62116d42f29c7f63000000
	VPSLLD -7(DI), Z18, K2, Z11                        // 62716d42f29ff9ffffff
	VPSLLD X0, Z24, K2, Z11                            // 62713d42f2d8

	VPXOR  REG_SUB_16, Y0, Y0

#define PRECALC_18(REG) \
	VPXOR Y0, REG, REG \
	VPSLLDQ $12, REG, Y9

#define PRECALC_19(REG) \
	VPSLLD $1, REG, Y0 \
	VPSRLD $31, REG, REG

#define PRECALC_20(REG) \
	VPOR REG, Y0, Y0 \
	VPSLLD $2, Y9,  REG

#define PRECALC_21(REG) \
	VPSRLD $30, Y9, Y9 \
	VPXOR REG, Y0, Y0

#define PRECALC_23(REG,K_OFFSET,OFFSET) \
	VPXOR Y9, Y0, REG \

	"VPSHRDQ",
	"VPSHRDVD",
	"VPSHRDVQ",
	"VPSHRDVW",
	"VPSHRDW",
	"VPSHUFB",
	"VPSHUFBITQMB",
	"VPSHUFD",
	"VPSHUFHW",
	"VPSHUFLW",
	"VPSIGNB",
	"VPSIGND",
	"VPSIGNW",
	"VPSLLD",
	"VPSLLDQ",
	"VPSLLQ",
	"VPSLLVD",
	"VPSLLVQ",
	"VPSLLVW",
	"VPSLLW",
	"VPSRAD",
	"VPSRAQ",
	"VPSRAVD",
	"VPSRAVQ",
	"VPSRAVW",
	"VPSRAW",
	"VPSRLD",

	ANDL     c, T1;                       \ // T1 = a&c								// MAJB
	;                                     \
	ADDL     y0, y2;                      \ // y2 = S1 + CH							// --
	VPSLLD   $(32-7), XTMP1, XTMP3;       \
	ORL      T1, y3;                      \ // y3 = MAJ = (a|c)&b)|(a&c)			// MAJ
	ADDL     y1, h;                       \ // h = k + w + h + S0					// --
	;                                     \

	VPSHUFLW $-1, X1, X2         // c5fb70d1ff
	VPSHUFLW $-1, Y1, Y2         // c5ff70d1ff
	VROUNDPD $-1, X1, X2         // c4e37909d1ff
	VROUNDPS $-1, Y1, Y2         // c4e37d08d1ff
	VPSLLD $-1, X1, X2           // c5e972f1ff
	VPSLLD $-1, Y1, Y2           // c5ed72f1ff
	VPSLLDQ $-1, X1, X2          // c5e973f9ff
	VPSLLDQ $-1, Y1, Y2          // c5ed73f9ff
	VPSLLQ $-1, X1, X2           // c5e973f1ff

	VPSIGNW Y11, Y15, Y11                   // c4420509db
	VPSLLD (BX), X9, X2             // c4e131f213 or c5b1f213
	VPSLLD (R11), X9, X2            // c4c131f213
	VPSLLD X2, X9, X2               // c4e131f2d2 or c5b1f2d2
	VPSLLD X11, X9, X2              // c4c131f2d3
	VPSLLD (BX), X9, X11            // c46131f21b or c531f21b
	VPSLLD (R11), X9, X11           // c44131f21b
	VPSLLD X2, X9, X11              // c46131f2da or c531f2da