Examples:

	MOVK $(10<<32), R20     <=>      movk x20, #10, lsl #32
	MOVZW $(20<<16), R8     <=>      movz w8, #20, lsl #16
	MOVK $(0<<16), R10 will be reported as an error by the assembler.

Special Cases.

(1) umov is written as VMOV.

(2) br is renamed JMP, blr is renamed CALL.

(3) No need to add "W" suffix: LDARB, LDARH, LDAXRB, LDAXRH, LDTRH, LDXRB, LDXRH.

	// UMOV <Wd>, <Vn>.<ts>[<index>]
	{0xffe0fc00, 0x0e003c00, UMOV, instArgs{arg_Wd, arg_Vn_arrangement_imm5___B_1__H_2__S_4_index__imm5__imm5lt41gt_1__imm5lt42gt_2__imm5lt43gt_4_1}, nil},
	// MOV <Xd>, <Vn>.D[<index_1>]
	{0xffe0fc00, 0x4e003c00, MOV, instArgs{arg_Xd, arg_Vn_arrangement_D_index__imm5_1}, mov_umov_asimdins_x_x_cond},
	// UMOV <Xd>, <Vn>.<ts_1>[<index_1>]

	case MSR:
		args[0] = inst.Args[0].String()

	case ST1:
		op = fmt.Sprintf("V%s", op) + suffix
		args[0], args[1] = args[1], args[0]

	case LD1:
		op = fmt.Sprintf("V%s", op) + suffix

	case UMOV:
		op = "VMOV"
	case NOP:
		op = "NOOP"

	default:
		index := sort.SearchStrings(noSuffixOpSet, op)
		if !(index < len(noSuffixOpSet) && noSuffixOpSet[index] == op) {
			rno := -1

{"Name":"UMOV","Bits":"0|0|0|0|1|1|1|0|0|0|0|imm5:5|0|0|1|1|1|1|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"UMOV <Wd>, <Vn>.<Ts>[<index>]","Code":"","Alias":"This instruction is used by the alias MOV (to general)."},