Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 25 for VMOV (0.03 sec)

  1. src/cmd/dist/vfp_arm.s

    // license that can be found in the LICENSE file.
    
    //go:build gc
    
    #include "textflag.h"
    
    // try to run "vmov.f64 d0, d0" instruction
    TEXT ·useVFPv1(SB),NOSPLIT,$0
    	WORD $0xeeb00b40	// vmov.f64 d0, d0
    	RET
    
    // try to run VFPv3-only "vmov.f64 d0, #112" instruction
    TEXT ·useVFPv3(SB),NOSPLIT,$0
    	WORD $0xeeb70b00	// vmov.f64 d0, #112
    	RET
    
    // try to run ARMv6K (or above) "ldrexd" instruction
    TEXT ·useARMv6K(SB),NOSPLIT,$32
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 651 bytes
    - Viewed (0)
  2. src/crypto/aes/gcm_arm64.s

    	MOVD.W	-8(srcPtr), H0
    	VMOV	H0, T0.D[0]
    	VMOV	H1, T3.D[0]
    ld4:
    	TBZ	$2, srcPtrLen, ld2
    	MOVW.W	-4(srcPtr), H0
    	VEXT	$12, T0.B16, ZERO.B16, T0.B16
    	VEXT	$12, T3.B16, ZERO.B16, T3.B16
    	VMOV	H0, T0.S[0]
    	VMOV	H1, T3.S[0]
    ld2:
    	TBZ	$1, srcPtrLen, ld1
    	MOVH.W	-2(srcPtr), H0
    	VEXT	$14, T0.B16, ZERO.B16, T0.B16
    	VEXT	$14, T3.B16, ZERO.B16, T3.B16
    	VMOV	H0, T0.H[0]
    	VMOV	H1, T3.H[0]
    ld1:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  3. src/crypto/aes/asm_arm64.s

    	MOVD	dec+24(FP), R11
    	LDP	rotInvSRows<>(SB), (R0, R1)
    	VMOV	R0, V3.D[0]
    	VMOV	R1, V3.D[1]
    	VEOR	V0.B16, V0.B16, V0.B16 // All zeroes
    	MOVW	$1, R13
    	TBZ	$1, R8, ks192
    	TBNZ	$2, R8, ks256
    	LDPW	(R9), (R4, R5)
    	LDPW	8(R9), (R6, R7)
    	STPW.P	(R4, R5), 8(R10)
    	STPW.P	(R6, R7), 8(R10)
    	MOVW	$0x1b, R14
    ks128Loop:
    		VMOV	R7, V2.S[0]
    		WORD	$0x4E030042       // TBL V3.B16, [V2.B16], V2.B16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 6.9K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/arm64/asm_arm64_test.s

    // testvmovs() (r1, r2 uint64)
    TEXT ·testvmovs(SB), NOSPLIT, $0-16
    	VMOVS   $0x80402010, V1
    	VMOV    V1.D[0], R0
    	VMOV    V1.D[1], R1
    	MOVD    R0, r1+0(FP)
    	MOVD    R1, r2+8(FP)
    	RET
    
    // testvmovd() (r1, r2 uint64)
    TEXT ·testvmovd(SB), NOSPLIT, $0-16
    	VMOVD   $0x7040201008040201, V1
    	VMOV    V1.D[0], R0
    	VMOV    V1.D[1], R1
    	MOVD    R0, r1+0(FP)
    	MOVD    R1, r2+8(FP)
    	RET
    
    // testvmovq() (r1, r2 uint64)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 22 02:46:11 UTC 2023
    - 892 bytes
    - Viewed (0)
  5. src/internal/chacha8rand/chacha8_arm64.s

    	VEOR V14.B16, V14.B16, V14.B16
    	VEOR V15.B16, V15.B16, V15.B16
    
    	// Save seed state for adding back later.
    	VMOV V4.B16, V20.B16
    	VMOV V5.B16, V21.B16
    	VMOV V6.B16, V22.B16
    	VMOV V7.B16, V23.B16
    	VMOV V8.B16, V24.B16
    	VMOV V9.B16, V25.B16
    	VMOV V10.B16, V26.B16
    	VMOV V11.B16, V27.B16
    
    	// 4 iterations. Each iteration is 8 quarter-rounds.
    	MOVD $4, R0
    loop:
    	QR(V0, V4, V8, V12)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Dec 05 20:34:30 UTC 2023
    - 3.2K bytes
    - Viewed (0)
  6. src/crypto/sha1/sha1block_arm64.s

    //go:build !purego
    
    #include "textflag.h"
    
    #define HASHUPDATECHOOSE \
    	SHA1C	V16.S4, V1, V2 \
    	SHA1H	V3, V1 \
    	VMOV	V2.B16, V3.B16
    
    #define HASHUPDATEPARITY \
    	SHA1P	V16.S4, V1, V2 \
    	SHA1H	V3, V1 \
    	VMOV	V2.B16, V3.B16
    
    #define HASHUPDATEMAJ \
    	SHA1M	V16.S4, V1, V2 \
    	SHA1H	V3, V1 \
    	VMOV	V2.B16, V3.B16
    
    // func sha1block(h []uint32, p []byte, k []uint32)
    TEXT ·sha1block(SB),NOSPLIT,$0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 3.5K bytes
    - Viewed (0)
  7. src/internal/bytealg/indexbyte_arm64.s

    	// which lane matches the requested byte.
    	// 0x40100401 = ((1<<0) + (4<<8) + (16<<16) + (64<<24))
    	// Different bytes have different bit masks (i.e: 1, 4, 16, 64)
    	MOVD	$0x40100401, R5
    	VMOV	R1, V0.B16
    	// Work with aligned 32-byte chunks
    	BIC	$0x1f, R0, R3
    	VMOV	R5, V5.S4
    	ANDS	$0x1f, R0, R9
    	AND	$0x1f, R2, R10
    	BEQ	loop
    
    	// Input string is not 32-byte aligned. We calculate the
    	// syndrome value for the aligned 32 bytes block containing
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 08 20:52:47 UTC 2018
    - 3.3K bytes
    - Viewed (0)
  8. src/crypto/sha256/sha256block_arm64.s

    	VLD1.P	16(R1), [V6.B16]                            // load 16bytes message
    	VLD1.P	16(R1), [V7.B16]                            // load 16bytes message
    	VMOV	V0.B16, V2.B16                              // backup: VO h(dcba)
    	VMOV	V1.B16, V3.B16                              // backup: V1 h(hgfe)
    	VMOV	V2.B16, V8.B16
    	VREV32	V4.B16, V4.B16                              // prepare for using message in Byte format
    	VREV32	V5.B16, V5.B16
    	VREV32	V6.B16, V6.B16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  9. src/internal/bytealg/count_arm64.s

    chunk:
    	BIC	$0x1f, R2, R9
    	// The first chunk can also be the last
    	CBZ	R9, tail
    	// R3 = end of 32-byte chunks
    	ADD	R0, R9, R3
    	MOVD	$1, R5
    	VMOV	R5, V5.B16
    	// R2 = length of tail
    	SUB	R9, R2, R2
    	// Duplicate R1 (byte to search) to 16 1-byte elements of V0
    	VMOV	R1, V0.B16
    	// Clear the low 64-bit element of V7 and V8
    	VEOR	V7.B8, V7.B8, V7.B8
    	VEOR	V8.B8, V8.B8, V8.B8
    	PCALIGN $16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 31 17:00:27 UTC 2023
    - 2K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VMOV	V8.D[0], V12.S[1]                                // ERROR "operand mismatch"
    	VMOV	V8.D[0], V12.H[1]                                // ERROR "operand mismatch"
    	VMOV	V8.D[0], V12.B[1]                                // ERROR "operand mismatch"
    	VMOV	V8.S[0], V12.H[1]                                // ERROR "operand mismatch"
    	VMOV	V8.S[0], V12.B[1]                                // ERROR "operand mismatch"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
Back to top