- Sort Score
- Result 10 results
- Languages All
Results 1 - 6 of 6 for TESTBconst (0.14 sec)
-
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(CMPBconst a:(ANDLconst [c] x) [0]) && a.Uses == 1 => (TESTBconst [int8(c)] x) // Convert TESTx to TESTxconst if possible. (TESTQ (MOVQconst [c]) x) && is32Bit(c) => (TESTQconst [int32(c)] x) (TESTL (MOVLconst [c]) x) => (TESTLconst [c] x) (TESTW (MOVLconst [c]) x) => (TESTWconst [int16(c)] x) (TESTB (MOVLconst [c]) x) => (TESTBconst [int8(c)] x) // TEST %reg,%reg is shorter than CMP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "TESTLconst", argLength: 1, reg: gp1flags, asm: "TESTL", typ: "Flags", aux: "Int32"}, {name: "TESTWconst", argLength: 1, reg: gp1flags, asm: "TESTW", typ: "Flags", aux: "Int16"}, {name: "TESTBconst", argLength: 1, reg: gp1flags, asm: "TESTB", typ: "Flags", aux: "Int8"}, // S{HL, HR, AR}x: shift operations // SHL: shift left // SHR: shift right logical (0s are shifted in from beyond the word size)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
if !(a.Uses == 1) { break } v.reset(OpAMD64TESTB) v.AddArg2(x, y) return true } // match: (CMPBconst a:(ANDLconst [c] x) [0]) // cond: a.Uses == 1 // result: (TESTBconst [int8(c)] x) for { if auxIntToInt8(v.AuxInt) != 0 { break } a := v_0 if a.Op != OpAMD64ANDLconst { break } c := auxIntToInt32(a.AuxInt) x := a.Args[0]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386.go
if !(l.Uses == 1) { break } v.reset(Op386TESTB) v.AddArg2(x, y) return true } // match: (CMPBconst l:(ANDLconst [c] x) [0]) // cond: l.Uses==1 // result: (TESTBconst [int8(c)] x) for { if auxIntToInt8(v.AuxInt) != 0 { break } l := v_0 if l.Op != Op386ANDLconst { break } c := auxIntToInt32(l.AuxInt) x := l.Args[0]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 21:05:46 UTC 2023 - 262.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
auxType: auxInt16, argLen: 1, asm: x86.ATESTW, reg: regInfo{ inputs: []inputInfo{ {0, 255}, // AX CX DX BX SP BP SI DI }, }, }, { name: "TESTBconst", auxType: auxInt8, argLen: 1, asm: x86.ATESTB, reg: regInfo{ inputs: []inputInfo{ {0, 255}, // AX CX DX BX SP BP SI DI }, }, }, {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)