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Results 1 - 6 of 6 for SB (0.14 sec)

  1. src/cmd/asm/internal/asm/testdata/riscv64error.s

    // Copyright 2021 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
    	MOV	$8(SP), (X5)			// ERROR "address load must target register"
    	MOVB	$8(SP), X5			// ERROR "unsupported address load"
    	MOVH	$8(SP), X5			// ERROR "unsupported address load"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
    - 2.8K bytes
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  2. src/cmd/asm/internal/asm/parse.go

    		}
    		p.errorf("illegal or missing addressing mode for symbol %s", name)
    		return
    	}
    	// Expect (SB), (FP), (PC), or (SP)
    	p.get('(')
    	reg := p.get(scanner.Ident).String()
    	p.get(')')
    	p.setPseudoRegister(a, reg, isStatic, prefix)
    }
    
    // setPseudoRegister sets the NAME field of addr for a pseudo-register reference such as (SB).
    func (p *Parser) setPseudoRegister(addr *obj.Addr, reg string, isStatic bool, prefix rune) {
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Feb 21 14:34:57 GMT 2024
    - 36.9K bytes
    - Viewed (0)
  3. src/archive/tar/writer_test.go

    	sb := strings.Split(strings.TrimSpace(hex.Dump(b)), "\n")
    	for len(sa) > 0 && len(sb) > 0 {
    		if sa[0] == sb[0] {
    			ss = append(ss, identity+sa[0])
    		} else {
    			ss = append(ss, uniqueA+sa[0])
    			ss = append(ss, uniqueB+sb[0])
    		}
    		sa, sb = sa[1:], sb[1:]
    	}
    	for len(sa) > 0 {
    		ss = append(ss, uniqueA+sa[0])
    		sa = sa[1:]
    	}
    	for len(sb) > 0 {
    		ss = append(ss, uniqueB+sb[0])
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Feb 27 16:39:23 GMT 2024
    - 38.7K bytes
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  4. src/cmd/asm/internal/asm/testdata/riscv64.s

    	MOVD	F0, F1					// d3000022
    
    	// TLS load with local-exec (LUI + ADDIW + ADD of TP + load)
    	MOV	tls(SB), X5				// b70f00009b8f0f00b38f4f0083b20f00
    	MOVB	tls(SB), X5				// b70f00009b8f0f00b38f4f0083820f00
    
    	// TLS store with local-exec (LUI + ADDIW + ADD of TP + store)
    	MOV	X5, tls(SB)				// b70f00009b8f0f00b38f4f0023b05f00
    	MOVB	X5, tls(SB)				// b70f00009b8f0f00b38f4f0023805f00
    
    	// NOT pseudo-instruction
    	NOT	X5					// 93c2f2ff
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
    - 16.7K bytes
    - Viewed (1)
  5. src/cmd/asm/internal/asm/asm.go

    		}
    	}
    }
    
    // asmGlobl assembles a GLOBL pseudo-op.
    // GLOBL shifts<>(SB),8,$256
    // GLOBL shifts<>(SB),$256
    func (p *Parser) asmGlobl(operands [][]lex.Token) {
    	if len(operands) != 2 && len(operands) != 3 {
    		p.errorf("expect two or three operands for GLOBL")
    		return
    	}
    
    	// Operand 0 has the general form foo<>+0x04(SB).
    	nameAddr := p.address(operands[0])
    	if !p.validSymbol("GLOBL", &nameAddr, false) {
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Feb 21 14:34:57 GMT 2024
    - 25.3K bytes
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  6. src/cmd/asm/internal/asm/testdata/ppc64.s

    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    // In case of base+displacement mode instructions if
    // the offset is 0, usage of (Rx) is equivalent to 0(Rx)
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	// move constants
    	MOVD $1, R3                     // 38600001
    	MOVD $-1, R4                    // 3880ffff
    	MOVD $65535, R5                 // 6005ffff
    	MOVD $65536, R6                 // 3cc00001
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
    - 49K bytes
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