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Results 1 - 10 of 3,170 for Registers (0.59 sec)

  1. src/cmd/asm/internal/asm/testdata/amd64error.s

    	VPGATHERQQ Y2, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    	VPGATHERQQ Y2, (BP)(X2*2), Y7   // ERROR "mask, index, and destination registers should be distinct"
    	VPGATHERQQ Y2, (BP)(X7*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    	VPGATHERQQ Y7, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jun 14 00:03:57 UTC 2023
    - 8.9K bytes
    - Viewed (0)
  2. src/internal/abi/abi_generic.go

    	// IntArgRegs is the number of registers dedicated
    	// to passing integer argument values. Result registers are identical
    	// to argument registers, so this number is used for those too.
    	IntArgRegs = 0
    
    	// FloatArgRegs is the number of registers dedicated
    	// to passing floating-point argument values. Result registers are
    	// identical to argument registers, so this number is used for
    	// those too.
    	FloatArgRegs = 0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 15 17:38:52 UTC 2024
    - 1.4K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/sys/unix/zptrace_mipsnn_linux.go

    //go:build linux && (mips || mips64)
    
    package unix
    
    import "unsafe"
    
    // PtraceRegsMips is the registers used by mips binaries.
    type PtraceRegsMips struct {
    	Regs     [32]uint64
    	Lo       uint64
    	Hi       uint64
    	Epc      uint64
    	Badvaddr uint64
    	Status   uint64
    	Cause    uint64
    }
    
    // PtraceGetRegsMips fetches the registers used by mips binaries.
    func PtraceGetRegsMips(pid int, regsout *PtraceRegsMips) error {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/config.go

    	registers      []Register     // machine registers
    	gpRegMask      regMask        // general purpose integer register mask
    	fpRegMask      regMask        // floating point register mask
    	fp32RegMask    regMask        // floating point register mask
    	fp64RegMask    regMask        // floating point register mask
    	specialRegMask regMask        // special register mask
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 02 16:11:47 UTC 2024
    - 12.9K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/regalloc.go

    	v *Value // Original (preregalloc) Value stored in this register.
    	c *Value // A Value equal to v which is currently in a register.  Might be v or a copy of it.
    	// If a register is unused, v==c==nil
    }
    
    type regAllocState struct {
    	f *Func
    
    	sdom        SparseTree
    	registers   []Register
    	numRegs     register
    	SPReg       register
    	SBReg       register
    	GReg        register
    	allocatable regMask
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 17:49:56 UTC 2023
    - 87.2K bytes
    - Viewed (0)
  6. pkg/proxy/apis/config/register.go

    // SchemeGroupVersion is group version used to register these objects
    var SchemeGroupVersion = schema.GroupVersion{Group: GroupName, Version: runtime.APIVersionInternal}
    
    var (
    	// SchemeBuilder is the scheme builder with scheme init functions to run for this API package
    	SchemeBuilder = runtime.NewSchemeBuilder(addKnownTypes)
    	// AddToScheme is a global function that registers this API group & version to a scheme
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Thu Sep 06 10:42:02 UTC 2018
    - 1.4K bytes
    - Viewed (0)
  7. src/runtime/cgo/gcc_s390x.S

    	/* save callee-saved floating point registers */
    	std     %f8, 0(%r15)
    	std     %f9, 8(%r15)
    	std     %f10, 16(%r15)
    	std     %f11, 24(%r15)
    	std     %f12, 32(%r15)
    	std     %f13, 40(%r15)
    	std     %f14, 48(%r15)
    	std     %f15, 56(%r15)
    
    	/* restore g pointer */
    	lgr     %r13, %r3
    
    	/* call fn */
    	basr    %r14, %r2
    
    	/* restore floating point registers */
    	ld      %f8, 0(%r15)
    	ld      %f9, 8(%r15)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Dec 05 16:41:48 UTC 2022
    - 1.4K bytes
    - Viewed (0)
  8. src/cmd/vendor/golang.org/x/sys/unix/zptrace_armnn_linux.go

    package unix
    
    import "unsafe"
    
    // PtraceRegsArm is the registers used by arm binaries.
    type PtraceRegsArm struct {
    	Uregs [18]uint32
    }
    
    // PtraceGetRegsArm fetches the registers used by arm binaries.
    func PtraceGetRegsArm(pid int, regsout *PtraceRegsArm) error {
    	return ptracePtr(PTRACE_GETREGS, pid, 0, unsafe.Pointer(regsout))
    }
    
    // PtraceSetRegsArm sets the registers used by arm binaries.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 1.2K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/mips/a.out.go

    //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p mips
    
    /*
     * mips 64
     */
    const (
    	NSNAME = 8
    	NSYM   = 50
    	NREG   = 32 /* number of general registers */
    	NFREG  = 32 /* number of floating point registers */
    	NWREG  = 32 /* number of MSA registers */
    )
    
    const (
    	REG_R0 = obj.RBaseMIPS + iota // must be a multiple of 32
    	REG_R1
    	REG_R2
    	REG_R3
    	REG_R4
    	REG_R5
    	REG_R6
    	REG_R7
    	REG_R8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 7.6K bytes
    - Viewed (0)
  10. src/runtime/mkpreempt.go

    	p("RET")
    }
    
    func genARM() {
    	// Add integer registers R0-R12.
    	// R13 (SP), R14 (LR), R15 (PC) are special and not saved here.
    	var l = layout{sp: "R13", stack: 4} // add LR slot
    	for i := 0; i <= 12; i++ {
    		reg := fmt.Sprintf("R%d", i)
    		if i == 10 {
    			continue // R10 is g register, no need to save/restore
    		}
    		l.add("MOVW", reg, 4)
    	}
    	// Add flag register.
    	l.addSpecial(
    		"MOVW CPSR, R0\nMOVW R0, %d(R13)",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 15.3K bytes
    - Viewed (0)
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