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Results 1 - 6 of 6 for ROLWconst (0.15 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    (ROLL x (MOV(Q|L)const [c])) => (ROLLconst [int8(c&31)] x)
    (ROLW x (MOV(Q|L)const [c])) => (ROLWconst [int8(c&15)] x)
    (ROLB x (MOV(Q|L)const [c])) => (ROLBconst [int8(c&7) ] x)
    
    (RORQ x (MOV(Q|L)const [c])) => (ROLQconst [int8((-c)&63)] x)
    (RORL x (MOV(Q|L)const [c])) => (ROLLconst [int8((-c)&31)] x)
    (RORW x (MOV(Q|L)const [c])) => (ROLWconst [int8((-c)&15)] x)
    (RORB x (MOV(Q|L)const [c])) => (ROLBconst [int8((-c)&7) ] x)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/386Ops.go

    		{name: "ROLLconst", argLength: 1, reg: gp11, asm: "ROLL", aux: "Int32", resultInArg0: true, clobberFlags: true}, // arg0 rotate left auxint, rotate amount 0-31
    		{name: "ROLWconst", argLength: 1, reg: gp11, asm: "ROLW", aux: "Int16", resultInArg0: true, clobberFlags: true}, // arg0 rotate left auxint, rotate amount 0-15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewrite386.go

    		v.copyOf(x)
    		return true
    	}
    	return false
    }
    func rewriteValue386_Op386ROLW(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (ROLW x (MOVLconst [c]))
    	// result: (ROLWconst [int16(c&15)] x)
    	for {
    		x := v_0
    		if v_1.Op != Op386MOVLconst {
    			break
    		}
    		c := auxIntToInt32(v_1.AuxInt)
    		v.reset(Op386ROLWconst)
    		v.AuxInt = int16ToAuxInt(int16(c & 15))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 21:05:46 UTC 2023
    - 262.4K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/rewriteAMD64.go

    	// match: (ROLW x (MOVQconst [c]))
    	// result: (ROLWconst [int8(c&15)] x)
    	for {
    		x := v_0
    		if v_1.Op != OpAMD64MOVQconst {
    			break
    		}
    		c := auxIntToInt64(v_1.AuxInt)
    		v.reset(OpAMD64ROLWconst)
    		v.AuxInt = int8ToAuxInt(int8(c & 15))
    		v.AddArg(x)
    		return true
    	}
    	// match: (ROLW x (MOVLconst [c]))
    	// result: (ROLWconst [int8(c&15)] x)
    	for {
    		x := v_0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "ROLLconst", argLength: 1, reg: gp11, asm: "ROLL", aux: "Int8", resultInArg0: true, clobberFlags: true},
    		{name: "ROLWconst", argLength: 1, reg: gp11, asm: "ROLW", aux: "Int8", resultInArg0: true, clobberFlags: true},
    		{name: "ROLBconst", argLength: 1, reg: gp11, asm: "ROLB", aux: "Int8", resultInArg0: true, clobberFlags: true},
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  6. src/cmd/compile/internal/ssa/opGen.go

    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    		},
    	},
    	{
    		name:         "ROLWconst",
    		auxType:      auxInt16,
    		argLen:       1,
    		resultInArg0: true,
    		clobberFlags: true,
    		asm:          x86.AROLW,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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