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Results 1 - 10 of 25 for Lsh8x8 (0.26 sec)

  1. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    //
    // (SLL x y) generates x << (y & 63).
    //
    // If y < 64, this is the value we want. Otherwise, we want zero.
    //
    // So, we AND with -1 * uint64(y < 64), which is 0xfffff... if y < 64 and 0 otherwise.
    (Lsh8x8   <t> x y) && !shiftIsBounded(v) => (AND (SLL <t> x y) (Neg8  <t> (SLTIU <t> [64] (ZeroExt8to64  y))))
    (Lsh8x16  <t> x y) && !shiftIsBounded(v) => (AND (SLL <t> x y) (Neg8  <t> (SLTIU <t> [64] (ZeroExt16to64 y))))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/LOONG64.rules

    (Lsh8x32 <t> x y) => (MASKEQZ (SLLV <t> x (ZeroExt32to64 y)) (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y)))
    (Lsh8x16 <t> x y) => (MASKEQZ (SLLV <t> x (ZeroExt16to64 y)) (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y)))
    (Lsh8x8  <t> x y) => (MASKEQZ (SLLV <t> x (ZeroExt8to64  y)) (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64  y)))
    
    (Rsh64Ux64 <t> x y) => (MASKEQZ (SRLV <t> x                y)  (SGTU (MOVVconst <typ.UInt64> [64])                y))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 31.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/generic.rules

    (Lsh8x16  <t> x (Const16 [c])) => (Lsh8x64  x (Const64 <t> [int64(uint16(c))]))
    (Lsh8x8   <t> x (Const8  [c])) => (Lsh8x64  x (Const64 <t> [int64(uint8(c))]))
    (Rsh8x32  <t> x (Const32 [c])) => (Rsh8x64  x (Const64 <t> [int64(uint32(c))]))
    (Rsh8x16  <t> x (Const16 [c])) => (Rsh8x64  x (Const64 <t> [int64(uint16(c))]))
    (Rsh8x8   <t> x (Const8  [c])) => (Rsh8x64  x (Const64 <t> [int64(uint8(c))]))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 16 22:21:05 UTC 2024
    - 135.3K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    (Lsh8x32 <t> x y) => (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
    (Lsh8x16 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
    (Lsh8x8 <t> x y)  => (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
    
    (Rsh32Ux32 <t> x y) => (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    (Lsh8x16 <t> x y) => (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
    (Lsh8x8  <t> x y) => (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64  y))) (SLLV <t> x (ZeroExt8to64  y)))
    
    (Rsh64Ux64 <t> x y) => (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> x y))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/genericOps.go

    	// Shift amounts are considered unsigned.
    	// If arg1 is known to be nonnegative and less than the number of bits in arg0,
    	// then auxInt may be set to 1.
    	// This enables better code generation on some platforms.
    	{name: "Lsh8x8", argLength: 2, aux: "Bool"}, // arg0 << arg1
    	{name: "Lsh8x16", argLength: 2, aux: "Bool"},
    	{name: "Lsh8x32", argLength: 2, aux: "Bool"},
    	{name: "Lsh8x64", argLength: 2, aux: "Bool"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 42.6K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/rewriteWasm.go

    		v.AddArg2(x, v0)
    		return true
    	}
    }
    func rewriteValueWasm_OpLsh8x8(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (Lsh8x8 [c] x y)
    	// result: (Lsh64x64 [c] x (ZeroExt8to64 y))
    	for {
    		c := auxIntToBool(v.AuxInt)
    		x := v_0
    		y := v_1
    		v.reset(OpLsh64x64)
    		v.AuxInt = boolToAuxInt(c)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 17 03:56:57 UTC 2023
    - 108.6K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/ARM.rules

    (Lsh16x8  x y) => (SLL x (ZeroExt8to32 y))
    
    (Lsh8x32 x y) => (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
    (Lsh8x16 x y) => (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
    (Lsh8x8  x y) => (SLL x (ZeroExt8to32 y))
    
    (Rsh32Ux32 x y) => (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0])
    (Rsh32Ux16 x y) => (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/rewriteRISCV64.go

    		return true
    	}
    	return false
    }
    func rewriteValueRISCV64_OpLsh8x8(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (Lsh8x8 <t> x y)
    	// cond: !shiftIsBounded(v)
    	// result: (AND (SLL <t> x y) (Neg8 <t> (SLTIU <t> [64] (ZeroExt8to64 y))))
    	for {
    		t := v.Type
    		x := v_0
    		y := v_1
    		if !(!shiftIsBounded(v)) {
    			break
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 205.1K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/rewritegeneric.go

    				continue
    			}
    			v.reset(OpRotateLeft8)
    			v.AddArg2(x, y)
    			return true
    		}
    		break
    	}
    	// match: (Add8 left:(Lsh8x8 x y) right:(Rsh8Ux8 x (Sub8 (Const8 [8]) y)))
    	// cond: (shiftIsBounded(left) || shiftIsBounded(right)) && canRotate(config, 8)
    	// result: (RotateLeft8 x y)
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 22 18:24:47 UTC 2024
    - 812.2K bytes
    - Viewed (0)
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