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Results 1 - 9 of 9 for I64Eq (0.34 sec)
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src/runtime/sys_wasm.s
// license that can be found in the LICENSE file. #include "textflag.h" TEXT runtime·wasmDiv(SB), NOSPLIT, $0-0 Get R0 I64Const $-0x8000000000000000 I64Eq If Get R1 I64Const $-1 I64Eq If I64Const $-0x8000000000000000 Return End End Get R0 Get R1 I64DivS Return TEXT runtime·wasmTruncS(SB), NOSPLIT, $0-0 Get R0 Get R0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 06 17:48:24 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/Wasm.rules
(Leq(64|32)F ...) => (F(64|32)Le ...) (Eq64 ...) => (I64Eq ...) (Eq32 x y) => (I64Eq (ZeroExt32to64 x) (ZeroExt32to64 y)) (Eq16 x y) => (I64Eq (ZeroExt16to64 x) (ZeroExt16to64 y)) (Eq8 x y) => (I64Eq (ZeroExt8to64 x) (ZeroExt8to64 y)) (EqB ...) => (I64Eq ...) (EqPtr ...) => (I64Eq ...) (Eq(64|32)F ...) => (F(64|32)Eq ...) (Neq64 ...) => (I64Ne ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 17 03:56:57 UTC 2023 - 16.9K bytes - Viewed (0) -
src/internal/bytealg/equal_wasm.s
I64Load 8(CTXT) // compiler stores size at offset 8 in the closure Call memeqbody<>(SB) I64Store8 ret+16(FP) RET // params: a, b, len // ret: 0/1 TEXT memeqbody<>(SB), NOSPLIT, $0-0 Get R0 Get R1 I64Eq If I64Const $1 Return End loop: Loop Get R2 I64Eqz If I64Const $1 Return End Get R0 I32WrapI64 I64Load8U $0 Get R1 I32WrapI64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Apr 24 00:56:36 UTC 2019 - 1.1K bytes - Viewed (0) -
src/cmd/internal/obj/wasm/anames.go
"I64Const", "F32Const", "F64Const", "I32Eqz", "I32Eq", "I32Ne", "I32LtS", "I32LtU", "I32GtS", "I32GtU", "I32LeS", "I32LeU", "I32GeS", "I32GeU", "I64Eqz", "I64Eq", "I64Ne", "I64LtS", "I64LtU", "I64GtS", "I64GtU", "I64LeS", "I64LeU", "I64GeS", "I64GeU", "F32Eq", "F32Ne", "F32Lt", "F32Gt", "F32Le", "F32Ge", "F64Eq",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 02 05:28:55 UTC 2023 - 2.8K bytes - Viewed (0) -
src/runtime/asm_wasm.s
MOVD CTXT, g_sched+gobuf_ctxt(g) // Cannot grow scheduler stack (m->g0). Get g Get R2 I64Eq If CALLNORESUME runtime·badmorestackg0(SB) CALLNORESUME runtime·abort(SB) End // Cannot grow signal stack (m->gsignal). Get g I64Load m_gsignal(R1) I64Eq If CALLNORESUME runtime·badmorestackgsignal(SB) CALLNORESUME runtime·abort(SB) End // Called from f.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 21:26:51 UTC 2023 - 11.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/WasmOps.go
{name: "F64Const", reg: fp64_01, aux: "Float64", rematerializeable: true, typ: "Float64"}, // returns the constant float aux {name: "I64Eqz", asm: "I64Eqz", argLength: 1, reg: gp11, typ: "Bool"}, // arg0 == 0 {name: "I64Eq", asm: "I64Eq", argLength: 2, reg: gp21, typ: "Bool"}, // arg0 == arg1 {name: "I64Ne", asm: "I64Ne", argLength: 2, reg: gp21, typ: "Bool"}, // arg0 != arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 17.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteWasm.go
if !(x != y) { break } v.reset(OpWasmI64Const) v.AuxInt = int64ToAuxInt(0) return true } // match: (I64Eq (I64Const [x]) y) // cond: y.Op != OpWasmI64Const // result: (I64Eq y (I64Const [x])) for { if v_0.Op != OpWasmI64Const { break } x := auxIntToInt64(v_0.AuxInt) y := v_1 if !(y.Op != OpWasmI64Const) { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 17 03:56:57 UTC 2023 - 108.6K bytes - Viewed (0) -
src/cmd/internal/obj/wasm/wasmobj.go
// // MOVD g_panic(g), R0 // Get R0 // I64Eqz // Not // If // Get SP // I64ExtendI32U // I64Const $framesize+8 // I64Add // I64Load panic_argp(R0) // I64Eq // If // MOVD SP, panic_argp(R0) // End // End gpanic := obj.Addr{ Type: obj.TYPE_MEM, Reg: REGG, Offset: 4 * 8, // g_panic } panicargp := obj.Addr{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 34.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 65535}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 }, }, }, { name: "I64Eq", argLen: 2, asm: wasm.AI64Eq, reg: regInfo{ inputs: []inputInfo{ {0, 281474976776191}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 SP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)