BEQ	R1, R2, label2	// BEQ R1, R2, 20	// 1022fffd

//
// other integer conditional branch
//
//	LBRA rreg ',' rel
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
label3:
	BLTZ	R1, 1(PC)	// BLTZ R1, 1(PC)	// 04200001
	BLTZ	R1, label3	// BLTZ R1, 22		// 0420fffd

//
// floating point conditional branch
//
//	LBRA rel
label4:
	BFPT	1(PC)	// BFPT 1(PC)			// 4501000100000000

<p>
"If" statements specify the conditional execution of two branches
according to the value of a boolean expression.  If the expression
evaluates to true, the "if" branch is executed, otherwise, if
present, the "else" branch is executed.
</p>

<pre class="ebnf">
IfStmt = "if" [ SimpleStmt ";" ] Expression Block [ "else" ( IfStmt | Block ) ] .
</pre>

<pre>
if x &gt; max {
	x = max

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branch: master...

The `debug/elf` package now defines [PT_OPENBSD_NOBTCFI]. This [ProgType] is
used to disable Branch Tracking Control Flow Integrity (BTCFI) enforcement

	CMPPD	foo+4(SB), X2, 4

// LTYPEX spec9	{ outcode($1, &$2); }
	PINSRW	$4, AX, X2
	PINSRW	$4, foo+4(SB), X2

// LTYPERT spec10	{ outcode($1, &$2); }
	JCS	2(PC)
	RETFL	$4

// Was bug: LOOP is a branch instruction.
	JCS	2(PC)
loop:
	LOOP	loop // LOOP

	// Intel pseudonyms for our own renamings.
	PADDD	M2, M1 // PADDL M2, M1
	MOVDQ2Q	X1, M1 // MOVQ X1, M1
	MOVNTDQ	X1, (AX)	// MOVNTO X1, (AX)

	}
	switch reg {
	case "FP":
		addr.Name = obj.NAME_PARAM
	case "PC":
		if prefix != 0 {
			p.errorf("illegal addressing mode for PC")
		}
		addr.Type = obj.TYPE_BRANCH // We set the type and leave NAME untouched. See asmJump.
	case "SB":
		addr.Name = obj.NAME_EXTERN
		if isStatic {
			addr.Name = obj.NAME_STATIC
		}
	case "SP":

<p>
"If" statements specify the conditional execution of two branches
according to the value of a boolean expression.  If the expression
evaluates to true, the "if" branch is executed, otherwise, if
present, the "else" branch is executed.
</p>

<pre class="ebnf">
IfStmt = "if" [ SimpleStmt ";" ] Expression Block [ "else" ( IfStmt | Block ) ] .
</pre>

<pre>
if x &gt; max {
	x = max

//	}
label2:
	BEQ	R1, R2, 1(PC)
	BEQ	R1, R2, label2	// BEQ R1, R2, 83

//
// other integer conditional branch
//
//	LBRA rreg ',' rel
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
label3:
	BLTZ	R1, 1(PC)
	BLTZ	R1, label3	// BLTZ R1, 85

//
// floating point conditional branch
//
//	LBRA rel
label4:
	BFPT	1(PC)
	BFPT	label4	// BFPT 87


	//

pkg debug/macho, const ARM_RELOC_SECTDIFF RelocTypeARM
pkg debug/macho, const ARM_RELOC_VANILLA = 0
pkg debug/macho, const ARM_RELOC_VANILLA RelocTypeARM
pkg debug/macho, const ARM_THUMB_32BIT_BRANCH = 7
pkg debug/macho, const ARM_THUMB_32BIT_BRANCH RelocTypeARM
pkg debug/macho, const ARM_THUMB_RELOC_BR22 = 6
pkg debug/macho, const ARM_THUMB_RELOC_BR22 RelocTypeARM
pkg debug/macho, const FlagAllModsBound = 4096