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Results 1 - 4 of 4 for FSUBR (0.05 sec)
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src/cmd/vendor/golang.org/x/arch/x86/x86asm/gnu.go
if symname == nil { symname = func(uint64) (string, uint64) { return "", 0 } } // Adjust opcode [sic]. switch inst.Op { case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP: // DC E0, DC F0: libopcodes swaps FSUBR/FSUB and FDIVR/FDIV, at least // if you believe the Intel manual is correct (the encoding is irregular as given; // libopcodes uses the more regular expected encoding).
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 21.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/intel.go
case FST, FSTP, FISTTP, FIST, FISTP, FBSTP: if len(args) == 1 { args = append(args, "st0") } case FLD, FXCH, FCOM, FCOMP, FIADD, FIMUL, FICOM, FICOMP, FISUBR, FIDIV, FUCOM, FUCOMP, FILD, FBLD, FADD, FMUL, FSUB, FSUBR, FISUB, FDIV, FDIVR, FIDIVR: if len(args) == 1 { args = []string{"st0", args[0]} } case MASKMOVDQU, MASKMOVQ, XLATB, OUTSB, OUTSW, OUTSD: FixSegment: for i := len(inst.Prefix) - 1; i >= 0; i-- {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 29 22:23:32 UTC 2017 - 11.7K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/tables.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 16 22:24:28 UTC 2022 - 266.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0)