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Results 1 - 3 of 3 for Copyright (0.18 sec)

  1. .github/workflows/update-rbe.yml

    # Copyright 2022 The TensorFlow Authors. All Rights Reserved.
    #
    # Licensed under the Apache License, Version 2.0 (the "License");
    # you may not use this file except in compliance with the License.
    # You may obtain a copy of the License at
    #
    #     http://www.apache.org/licenses/LICENSE-2.0
    #
    # Unless required by applicable law or agreed to in writing, software
    # distributed under the License is distributed on an "AS IS" BASIS,
    Others
    - Registered: Tue Apr 23 12:39:09 GMT 2024
    - Last Modified: Wed Apr 10 15:40:34 GMT 2024
    - 7.2K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/riscv64error.s

    // Copyright 2021 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
    	MOV	$8(SP), (X5)			// ERROR "address load must target register"
    	MOVB	$8(SP), X5			// ERROR "unsupported address load"
    	MOVH	$8(SP), X5			// ERROR "unsupported address load"
    Others
    - Registered: Tue Apr 23 11:13:09 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
    - 2.8K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/ppc64.s

    // Copyright 2015 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    // This contains the majority of valid opcode combinations
    // available in cmd/internal/obj/ppc64/asm9.go with
    // their valid instruction encodings.
    
    #include "../../../../../runtime/textflag.h"
    
    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    Others
    - Registered: Tue Apr 23 11:13:09 GMT 2024
    - Last Modified: Mon Apr 01 18:50:29 GMT 2024
    - 48.8K bytes
    - Viewed (0)
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