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  1. src/cmd/asm/internal/asm/testdata/mips64.s

    	BEQ	R1, 2(PC)
    	JAL	1(PC)		// CALL 1(PC)	// 0c00000f
    	BEQ	R1, 2(PC)
    	JAL	label0+0	// CALL 3	// 0c000007
    
    //	LBRA addr
    //	{
    //		outcode(int($1), &nullgen, 0, &$2);
    //	}
    	BEQ	R1, 2(PC)
    	JMP	0(R1)		// JMP (R1)	// 00200008
    	BEQ	R1, 2(PC)
    	JMP	foo+0(SB)	// JMP foo(SB)	// 08000019
    	BEQ	R1, 2(PC)
    	JAL	0(R1)		// CALL (R1)	// 0020f809
    	BEQ	R1, 2(PC)
    	JAL	foo+0(SB)	// CALL foo(SB)	// 0c000021
    
    //
    // BEQ/BNE
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 12.4K bytes
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  2. src/cmd/asm/internal/asm/testdata/s390x.s

    	RET
    	RET	foo(SB)
    
    TEXT main·init(SB),DUPOK|NOSPLIT,$0 // TEXT main.init(SB), DUPOK|NOSPLIT, $0
    	RET
    
    TEXT main·main(SB),DUPOK|NOSPLIT,$0 // TEXT main.main(SB), DUPOK|NOSPLIT, $0
    	BL      main·foo(SB)    // CALL main.foo(SB)
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Nov 22 03:55:32 GMT 2023
    - 21.6K bytes
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  3. src/cmd/asm/internal/asm/testdata/ppc64.s

    // Copyright 2015 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    // This contains the majority of valid opcode combinations
    // available in cmd/internal/obj/ppc64/asm9.go with
    // their valid instruction encodings.
    
    #include "../../../../../runtime/textflag.h"
    
    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
    - 49K bytes
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  4. src/cmd/asm/internal/asm/testdata/arm.s

    	BL.GE	4(PC)  // CALL.GE 4(PC)    // 020000ab
    	BL.LT	3(PC)  // CALL.LT 3(PC)    // 010000bb
    	BL.GT	2(PC)  // CALL.GT 2(PC)    // 000000cb
    	BL.LE	1(PC)  // CALL.LE 1(PC)    // ffffffdb
    	ADD	$0, R0, R0
    	BL	-1(PC) // CALL -1(PC)      // fdffffeb
    	BL	-2(PC) // CALL -2(PC)      // fcffffeb
    	BL	-3(PC) // CALL -3(PC)      // fbffffeb
    	BL	-4(PC) // CALL -4(PC)      // faffffeb
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
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  5. .github/ISSUE_TEMPLATE/02-pkgsite-removal.yml

          label: "What is the path of the package that you would like to have removed?"
          description: |
            We can remove packages with a shared path prefix.
            For example, a request for 'github.com/author' would remove all pkg.go.dev pages with that package path prefix.
        validations:
          required: true
      - type: textarea
        id: package-owner
        attributes:
          label: "Are you the owner of this package?"
          description: |
    Others
    - Registered: Tue May 07 11:14:38 GMT 2024
    - Last Modified: Thu Jan 04 23:31:17 GMT 2024
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  6. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	BICS R19->12, R1, R23                      // 3730b3ea
    	BICS R19, R1, R23                          // 370033ea
    	BICS R19>>0, R1, R23                       // 370073ea
    	CALL -1(PC)                                // ffffff97
    	CALL (R15)                                 // e0013fd6
    	JMP  (R29)                                 // a0031fd6
    	BRK $35943                                 // e08c31d4
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Mon Jul 24 01:11:41 GMT 2023
    - 43.9K bytes
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  7. src/cmd/asm/internal/asm/testdata/riscv64error.s

    // Copyright 2021 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
    	MOV	$8(SP), (X5)			// ERROR "address load must target register"
    	MOVB	$8(SP), X5			// ERROR "unsupported address load"
    	MOVH	$8(SP), X5			// ERROR "unsupported address load"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
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  8. src/cmd/asm/internal/asm/testdata/arm64.s

    // RET
    	RET
    	RET	foo(SB)
    
    // B/BL/B.cond cases, and canonical names JMP, CALL.
    	BL	1(PC)      // CALL 1(PC)
    	BL	(R2)       // CALL (R2)
    	BL	foo(SB)    // CALL foo(SB)
    	BL	bar<>(SB)  // CALL bar<>(SB)
    	B	foo(SB)    // JMP foo(SB)
    	BEQ	1(PC)
    	BEQ	2(PC)
    	TBZ	$1, R1, 2(PC)
    	TBNZ	$2, R2, 2(PC)
    	JMP	foo(SB)
    	CALL	foo(SB)
    
    // ADR
    	ADR	next, R11     // ADR R11 // 2b000010
    next:
    	NOP
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
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  9. src/cmd/asm/internal/asm/testdata/mips.s

    	JMP	label0+0	// JMP 66
    	BEQ	R1, 2(PC)
    	JAL	1(PC)	// CALL 1(PC)
    	BEQ	R1, 2(PC)
    	JAL	label0+0	// CALL 66
    
    	//	LBRA addr
    	//	{
    	//		outcode(int($1), &nullgen, 0, &$2);
    	//	}
    	BEQ	R1, 2(PC)
    	JMP	0(R1)	// JMP (R1)
    	BEQ	R1, 2(PC)
    	JMP	foo+0(SB)	// JMP foo(SB)
    	BEQ	R1, 2(PC)
    	JAL	0(R1)	// CALL (R1)
    	BEQ	R1, 2(PC)
    	JAL	foo+0(SB)	// CALL foo(SB)
    
    //
    // BEQ/BNE
    //
    //	LBRA rreg ',' rel
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 6.7K bytes
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  10. src/cmd/asm/internal/asm/testdata/riscv64.s

    	JMP	2(PC)					// 6f008000
    	JMP	(X5)					// 67800200
    	JMP	4(X5)					// 67804200
    
    	// CALL and JMP to symbol are encoded as JAL (using LR or ZERO
    	// respectively), with a R_RISCV_JAL relocation. The linker resolves
    	// the real address and updates the immediate, using a trampoline in
    	// the case where the address is not directly reachable.
    	CALL	asmtest(SB)				// ef000000
    	JMP	asmtest(SB)				// 6f000000
    
    	// Branch pseudo-instructions
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
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