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Results 1 - 6 of 6 for AFNMADDD (0.09 sec)

  1. src/cmd/internal/obj/riscv/cpu.go

    	AFLD
    	AFSD
    
    	// 12.4: Double-Precision Floating-Point Computational Instructions
    	AFADDD
    	AFSUBD
    	AFMULD
    	AFDIVD
    	AFMIND
    	AFMAXD
    	AFSQRTD
    	AFMADDD
    	AFMSUBD
    	AFNMADDD
    	AFNMSUBD
    
    	// 12.5: Double-Precision Floating-Point Conversion and Move Instructions
    	AFCVTWD
    	AFCVTLD
    	AFCVTDW
    	AFCVTDL
    	AFCVTWUD
    	AFCVTLUD
    	AFCVTDWU
    	AFCVTDLU
    	AFCVTSD
    	AFCVTDS
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/riscv/inst.go

    	case AFMVXD:
    		return &inst{0x53, 0x0, 0x0, -480, 0x71}
    	case AFMVXS:
    		return &inst{0x53, 0x0, 0x0, -512, 0x70}
    	case AFMVXW:
    		return &inst{0x53, 0x0, 0x0, -512, 0x70}
    	case AFNMADDD:
    		return &inst{0x4f, 0x0, 0x0, 32, 0x1}
    	case AFNMADDQ:
    		return &inst{0x4f, 0x0, 0x0, 96, 0x3}
    	case AFNMADDS:
    		return &inst{0x4f, 0x0, 0x0, 0, 0x0}
    	case AFNMSUBD:
    		return &inst{0x4b, 0x0, 0x0, 32, 0x1}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.9K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm64/a.out.go

    	AFMADDS
    	AFMAXD
    	AFMAXNMD
    	AFMAXNMS
    	AFMAXS
    	AFMIND
    	AFMINNMD
    	AFMINNMS
    	AFMINS
    	AFMOVD
    	AFMOVQ
    	AFMOVS
    	AFMSUBD
    	AFMSUBS
    	AFMULD
    	AFMULS
    	AFNEGD
    	AFNEGS
    	AFNMADDD
    	AFNMADDS
    	AFNMSUBD
    	AFNMSUBS
    	AFNMULD
    	AFNMULS
    	AFRINTAD
    	AFRINTAS
    	AFRINTID
    	AFRINTIS
    	AFRINTMD
    	AFRINTMS
    	AFRINTND
    	AFRINTNS
    	AFRINTPD
    	AFRINTPS
    	AFRINTXD
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 18 17:56:30 UTC 2023
    - 18.1K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/riscv/obj.go

    	AFMAXD & obj.AMask:   rFFFEncoding,
    	AFSQRTD & obj.AMask:  rFFFEncoding,
    	AFMADDD & obj.AMask:  rFFFFEncoding,
    	AFMSUBD & obj.AMask:  rFFFFEncoding,
    	AFNMSUBD & obj.AMask: rFFFFEncoding,
    	AFNMADDD & obj.AMask: rFFFFEncoding,
    
    	// 12.5: Double-Precision Floating-Point Conversion and Move Instructions
    	AFCVTWD & obj.AMask:  rFIEncoding,
    	AFCVTLD & obj.AMask:  rFIEncoding,
    	AFCVTDW & obj.AMask:  rIFEncoding,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 77K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/arm64/asm7.go

    		case AFMSUBD:
    			oprangeset(AFMSUBS, t)
    			oprangeset(AFMADDS, t)
    			oprangeset(AFMADDD, t)
    			oprangeset(AFNMSUBS, t)
    			oprangeset(AFNMSUBD, t)
    			oprangeset(AFNMADDS, t)
    			oprangeset(AFNMADDD, t)
    
    		case AFCVTSD:
    			oprangeset(AFCVTDS, t)
    			oprangeset(AFABSD, t)
    			oprangeset(AFABSS, t)
    			oprangeset(AFNEGD, t)
    			oprangeset(AFNEGS, t)
    			oprangeset(AFSQRTD, t)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/opGen.go

    			},
    		},
    	},
    	{
    		name:   "FNMADDD",
    		argLen: 3,
    		asm:    arm64.AFNMADDD,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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