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Results 1 - 10 of 22 for 1x1x1x256xf32 (0.15 sec)

  1. tensorflow/compiler/mlir/lite/experimental/tac/tests/device-transform-gpu.mlir

      %0:4 = "tfl.split"(%arg0, %arg1) {num_splits = 4 : i32, tac.device = "CPU"} : (tensor<i32>, tensor<1x8x8x1024xf32>) -> (tensor<1x8x8x256xf32>, tensor<1x8x8x256xf32>, tensor<1x8x8x256xf32>, tensor<1x8x8x256xf32>)
      func.return %0#0, %0#1, %0#3 : tensor<1x8x8x256xf32>, tensor<1x8x8x256xf32>, tensor<1x8x8x256xf32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 15.6K bytes
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  2. tensorflow/compiler/mlir/lite/tests/optimize.mlir

      %1 = "tfl.mul"(%0, %cst_2) {fused_activation_function = "NONE"} : (tensor<1x8x8x256xf32>, tensor<1x1x1x256xf32>) -> tensor<1x8x8x256xf32>
      func.return %1 : tensor<1x8x8x256xf32>
    
    // CHECK-DAG: %[[CST_0:.*]] = arith.constant dense<2.800000e+00> : tensor<256x3x3x207xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 16 20:31:41 UTC 2024
    - 284.1K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir

      return %0 : tensor<1x1x1x2xf32>
    }
    func.func private @XlaCallModule_aten.avg_pool2d.default.impl_5(%arg0: tensor<1x1x1x7xf32>) -> tensor<1x1x1x2xf32>
    
    // CHECK-LABEL: avg_pool2d_6
    // CHECK: %cst = arith.constant dense<[0, 2, 3, 1]> : tensor<4xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 18:45:51 UTC 2024
    - 32.6K bytes
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  4. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/mix_tflite_vhlo.mlir

    // test stablehlo roundtrip
    
    module {
    func.func @main(%arg0: tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32> {
      %0 = "vhlo.logistic_v1"(%arg0) : (tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32>
      %1 = "tfl.exp"(%0) : (tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32> loc("exp")
      func.return %1 : tensor<1x1x1x96xf32>
    }
    }
    
    // CHECK: func.func @main(%arg0: tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32> attributes {tf.entry_function = {inputs = "arg0", outputs = "exp"}} {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 14 19:15:40 UTC 2024
    - 907 bytes
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  5. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/vhlo.mlir

    func.func @exp(%arg0: tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32> {
      %0 = "vhlo.exponential_v1" (%arg0) : (tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32>
      func.return %0 : tensor<1x1x1x96xf32>
    }
    
    //CHECK:func.func private @exp(%arg0: tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32> {
    //CHECK-NEXT: %0 = "vhlo.exponential_v1"(%arg0) : (tensor<1x1x1x96xf32>) -> tensor<1x1x1x96xf32>
    //CHECK-NEXT: return %0 : tensor<1x1x1x96xf32>
    //CHECK-NEXT:}
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 14 19:15:40 UTC 2024
    - 31.9K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/vhlo_const.mlir

    module attributes {tfl.metadata = {"keep_stablehlo_constant" = "true"}} {
     func.func @main () -> tensor<1x1x1x96xf32> {
      %0 = "vhlo.constant_v1"() <{value = #vhlo.tensor_v1<dense<0.000000e+00> : tensor<f32>>}> : () -> tensor<1x1x1x96xf32>
      func.return %0 : tensor<1x1x1x96xf32>
     }
    }
    
    //CHECK: func.func @main() -> tensor<1x1x1x96xf32> attributes {tf.entry_function = {outputs = "vhlo.constant_v1"}} {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 14 19:15:40 UTC 2024
    - 833 bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/many_attribute_op.mlir

    func.func @main(tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32> {
    ^bb0(%arg0: tensor<1x6x6x16xf32>):
      // CHECK: "tfl.average_pool_2d"(%{{.*}}) <{filter_height = 3 : i32, filter_width = 6 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 3 : i32, stride_w = 1 : i32}> : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 824 bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir

                                 %arg2: tensor<256xf32>,          // batch_norm args
                                 %arg3: tensor<7x7x3x64xf32>,    // conv filter #0
                                 %arg4: tensor<1x1x64x256xf32>   // conv filter #1
                                ) -> tensor<?x256xf32> {
    
      // This is a simplified ResNet layer that gets input in NHWC format, converts
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.3K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/nn.mlir

      func.return %0 : tensor<1x1x1x16xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 2.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/experimental/tac/tests/e2e/simple-graph.mlir

    // CHECK:  [[VAL_3:%.*]] = "tfl.reshape"([[VAL_2]], %{{.*}}) : (tensor<1x1x1x2xf32>, tensor<2xi32>) -> tensor<2x1xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 1.6K bytes
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