MOVOU 80(DI), X12 PCLMULQDQ $0x00, X2, X12 PXOR X12, X10 MOVOU 96(DI), X12 MOVOU X12, X13 PCLMULQDQ $0x00, X3, X12 PXOR X12, X8 PCLMULQDQ $0x11, X3, X13 PXOR X13, X9 PSHUFD $0x4e, X3, X12 PXOR X12, X3 MOVOU 112(DI), X12 PCLMULQDQ $0x00, X3, X12 PXOR X12, X10 MOVOU 128(DI), X12 MOVOU X12, X13 PCLMULQDQ $0x00, X4, X12 PXOR X12, X8 PCLMULQDQ $0x11, X4, X13 PXOR X13, X9 PSHUFD $0x4e, X4, X12 PXOR X12, X4 MOVOU 144(DI), X12 PCLMULQDQ $0x00, X4, X12 PXOR X12, X10 MOVOU 160(DI), X12 MOVOU X12, X13 PCLMULQDQ...

	CXOR	X10, X11, X12				// ERROR "rd must be the same as rs1"
	CXOR	X5, X11					// ERROR "expected integer prime register in rs2"
	CXOR	X10, X5					// ERROR "expected integer prime register in rd"
	CSUB	X10, X11, X12				// ERROR "rd must be the same as rs1"
	CSUB	X5, X11					// ERROR "expected integer prime register in rs2"
	CSUB	X10, X5					// ERROR "expected integer prime register in rd"

	VSETVLI	X10, E32, MF8, TA, MA, X12		// 5776550d
	VSETVLI	X10, E32, MF4, TA, MA, X12		// 5776650d
	VSETVLI	X10, E32, MF2, TA, MA, X12		// 5776750d
	VSETVLI	X10, E32, M1, TA, MA, X12		// 5776050d
	VSETVLI	$15, E32, M1, TA, MA, X12		// 57f607cd
	VSETIVLI $0, E32, M1, TA, MA, X12		// 577600cd
	VSETIVLI $15, E32, M1, TA, MA, X12		// 57f607cd
	VSETIVLI $31, E32, M1, TA, MA, X12		// 57f60fcd
	VSETVL	X10, X11, X12				// 57f6a580

	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"