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Results 1 - 10 of 312 for tmp2 (0.07 sec)
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src/crypto/internal/nistec/p256_asm_ppc64le.s
#define VMULT(x1, x2, out_low, out_hi) \ VMULEUW x1, x2, TMP1; \ VMULOUW x1, x2, TMP2; \ VMRGEW TMP1, TMP2, out_hi; \ VMRGOW TMP1, TMP2, out_low // // Vector multiply add word // // VMALF x0, x1, y, out_low // VMALHF x0, x1, y, out_hi #define VMULT_ADD(x1, x2, y, one, out_low, out_hi) \ VMULEUW y, one, TMP2; \ VMULOUW y, one, TMP1; \ VMULEUW x1, x2, out_low; \ VMULOUW x1, x2, out_hi; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
loop192: VPERM IN1, IN1, MASK, KEY // vperm 3,2,2,5 VSLDOI $12, ZERO, IN0, TMP // vsldoi 6,0,1,12 VCIPHERLAST KEY, RCON, KEY // vcipherlast 3,3,4 VXOR IN0, TMP, IN0 // vxor 1,1,6 VSLDOI $12, ZERO, TMP, TMP // vsldoi 6,0,6,12 VXOR IN0, TMP, IN0 // vxor 1,1,6 VSLDOI $12, ZERO, TMP, TMP // vsldoi 6,0,6,12 VXOR IN0, TMP, IN0 // vxor 1,1,6 VSLDOI $8, ZERO, IN1, STAGE // vsldoi 7,0,2,8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
src/sort/sort_test.go
modes := []string{"copy", "reverse", "reverse1", "reverse2", "sort", "dither"} var tmp1, tmp2 [1025]int for _, n := range sizes { for m := 1; m < 2*n; m *= 2 { for dist := 0; dist < _NDist; dist++ { j := 0 k := 1 data := tmp1[0:n] for i := 0; i < n; i++ { switch dist { case _Sawtooth: data[i] = i % m case _Rand:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 19:41:04 UTC 2024 - 16.9K bytes - Viewed (0) -
src/crypto/aes/gcm_ppc64x.s
# else #define NEEDS_ESPERM #define P8_LXVB16X(RA,RB,VT) \ LXVD2X (RA+RB), VT \ VPERM VT, VT, ESPERM, VT #define P8_STXVB16X(VS,RA,RB) \ VPERM VS, VS, ESPERM, TMP2; \ STXVD2X TMP2, (RA+RB) # endif #else #define P8_LXVB16X(RA,RB,VT) \ LXVD2X (RA+RB), VT #define P8_STXVB16X(VS,RA,RB) \ STXVD2X VS, (RA+RB) #endif #define MASK_PTR R8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0) -
android/guava/src/com/google/common/base/CharMatcher.java
@GwtIncompatible // used only from other GwtIncompatible code @Override void setBits(BitSet table) { BitSet tmp1 = new BitSet(); first.setBits(tmp1); BitSet tmp2 = new BitSet(); second.setBits(tmp2); tmp1.and(tmp2); table.or(tmp1); } @Override public String toString() { return "CharMatcher.and(" + first + ", " + second + ")"; }
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Fri Feb 09 15:49:48 UTC 2024 - 53.7K bytes - Viewed (0) -
guava/src/com/google/common/base/CharMatcher.java
@GwtIncompatible // used only from other GwtIncompatible code @Override void setBits(BitSet table) { BitSet tmp1 = new BitSet(); first.setBits(tmp1); BitSet tmp2 = new BitSet(); second.setBits(tmp2); tmp1.and(tmp2); table.or(tmp1); } @Override public String toString() { return "CharMatcher.and(" + first + ", " + second + ")"; }
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Fri Feb 09 15:49:48 UTC 2024 - 53.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
// Restrict this optimization to the stack, to avoid duplicating loads from the heap; // see CL 145208 for discussion. (Move {t1} [s] dst tmp1 midmem:(Move {t2} [s] tmp2 src _)) && t1.Compare(t2) == types.CMPeq && isSamePtr(tmp1, tmp2) && isStackPtr(src) && !isVolatile(src) && disjoint(src, s, tmp2, s) && (disjoint(src, s, dst, s) || isInlinableMemmove(dst, src, s, config)) => (Move {t1} [s] dst src midmem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/compile/internal/walk/order.go
// The caller should order the right-hand side of the assignment before calling order.as2func. // It rewrites, // // a, b, a = ... // // as // // tmp1, tmp2, tmp3 = ... // a, b, a = tmp1, tmp2, tmp3 // // This is necessary to ensure left to right assignment order. func (o *orderState) as2func(n *ir.AssignListStmt) { results := n.Rhs[0].Type()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 08 02:00:33 UTC 2024 - 42.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritegeneric.go
v3.AddArg3(v4, d3, v5) v1.AddArg3(v2, d2, v3) v.AddArg3(v0, d1, v1) return true } // match: (Move {t1} [s] dst tmp1 midmem:(Move {t2} [s] tmp2 src _)) // cond: t1.Compare(t2) == types.CMPeq && isSamePtr(tmp1, tmp2) && isStackPtr(src) && !isVolatile(src) && disjoint(src, s, tmp2, s) && (disjoint(src, s, dst, s) || isInlinableMemmove(dst, src, s, config)) // result: (Move {t1} [s] dst src midmem) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/odml-to-stablehlo-allow-tf.mlir
// RUN: odml_to_stablehlo %s --allow-tf=false -o /tmp/temp.mlir; [ -f /tmp/temp.mlir ]; [ -f /tmp/debug_stablehlo.mlir ] // RUN: odml_to_stablehlo %s --allow-tf=true -o /tmp/temp2.mlir; [ -f /tmp/temp2.mlir ] module attributes {tf.versions = {bad_consumers = [], min_consumer = 12 : i32, producer = 975 : i32}, tf_saved_model.semantics} {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 18:33:43 UTC 2024 - 914 bytes - Viewed (0)