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Results 1 - 9 of 9 for secondselect (0.18 sec)
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src/cmd/compile/internal/ssa/_gen/AMD64.rules
(CondSelect <t> x y check) && !check.Type.IsFlags() && check.Type.Size() == 1 => (CondSelect <t> x y (MOVBQZX <typ.UInt64> check)) (CondSelect <t> x y check) && !check.Type.IsFlags() && check.Type.Size() == 2 => (CondSelect <t> x y (MOVWQZX <typ.UInt64> check)) (CondSelect <t> x y check) && !check.Type.IsFlags() && check.Type.Size() == 4 => (CondSelect <t> x y (MOVLQZX <typ.UInt64> check))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
// match: (CondSelect <t> x y check) // cond: !check.Type.IsFlags() && check.Type.Size() == 2 // result: (CondSelect <t> x y (MOVWQZX <typ.UInt64> check)) for { t := v.Type x := v_0 y := v_1 check := v_2 if !(!check.Type.IsFlags() && check.Type.Size() == 2) { break } v.reset(OpCondSelect) v.Type = t v0 := b.NewValue0(v.Pos, OpAMD64MOVWQZX, typ.UInt64) v0.AddArg(check)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/check.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 09 16:41:23 UTC 2024 - 17.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/genericOps.go
{name: "Leq32F", argLength: 2, typ: "Bool"}, {name: "Leq64F", argLength: 2, typ: "Bool"}, // the type of a CondSelect is the same as the type of its first // two arguments, which should be register-width scalars; the third // argument should be a boolean {name: "CondSelect", argLength: 3}, // arg2 ? arg0 : arg1 // boolean ops
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 42.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(CondSelect x y (SETBC [a] cmp)) => (ISEL [a] x y cmp) (CondSelect x y (SETBCR [a] cmp)) => (ISEL [a+4] x y cmp) // Only lower after bool is lowered. It should always lower. This helps ensure the folding below happens reliably. (CondSelect x y bool) && flagArg(bool) == nil => (ISEL [6] x y (CMPconst [0] (ANDconst [1] bool)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(FCMPD x (FMOVDconst [0])) => (FCMPD0 x) (FCMPD (FMOVDconst [0]) x) => (InvertFlags (FCMPD0 x)) // CSEL needs a flag-generating argument. Synthesize a TSTW if necessary. (CondSelect x y boolval) && flagArg(boolval) != nil => (CSEL [boolval.Op] x y flagArg(boolval)) (CondSelect x y boolval) && flagArg(boolval) == nil => (CSEL [OpARM64NotEqual] x y (TSTWconst [1] boolval)) (OffPtr [off] ptr:(SP)) && is32Bit(off) => (MOVDaddr [int32(off)] ptr)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64.go
typ := &b.Func.Config.Types // match: (CondSelect x y (SETBC [a] cmp)) // result: (ISEL [a] x y cmp) for { x := v_0 y := v_1 if v_2.Op != OpPPC64SETBC { break } a := auxIntToInt32(v_2.AuxInt) cmp := v_2.Args[0] v.reset(OpPPC64ISEL) v.AuxInt = int32ToAuxInt(a) v.AddArg3(x, y, cmp) return true } // match: (CondSelect x y (SETBCR [a] cmp))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
v.Op = OpARM64MVN return true case OpCom32: v.Op = OpARM64MVN return true case OpCom64: v.Op = OpARM64MVN return true case OpCom8: v.Op = OpARM64MVN return true case OpCondSelect: return rewriteValueARM64_OpCondSelect(v) case OpConst16: return rewriteValueARM64_OpConst16(v) case OpConst32: return rewriteValueARM64_OpConst32(v) case OpConst32F:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
OpLess32U OpLess64 OpLess64U OpLess32F OpLess64F OpLeq8 OpLeq8U OpLeq16 OpLeq16U OpLeq32 OpLeq32U OpLeq64 OpLeq64U OpLeq32F OpLeq64F OpCondSelect OpAndB OpOrB OpEqB OpNeqB OpNot OpNeg8 OpNeg16 OpNeg32 OpNeg64 OpNeg32F OpNeg64F OpCom8 OpCom16 OpCom32 OpCom64 OpCtz8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)