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Results 1 - 6 of 6 for mov (0.05 seconds)

  1. src/cmd/asm/internal/asm/testdata/riscv64.s

    	// MOV pseudo-instructions
    	MOV	X5, X6								// 13830200
    	MOV	$2047, X5							// 9302f07f
    	MOV	$-2048, X5							// 93020080
    	MOV	$2048, X5							// b71200009b820280
    	MOV	$-2049, X5							// b7f2ffff9b82f27f
    	MOV	$4096, X5							// b7120000
    	MOV	$0x7ffff000, X5		// MOV	$2147479552, X5			// b7f2ff7f
    	MOV	$-0x7ffff000, X5	// MOV	$-2147479552, X5		// b7120080
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Sat Apr 04 05:25:40 GMT 2026
    - 74.2K bytes
    - Click Count (0)
  2. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
    	MOV	$0, 0(SP)			// ERROR "constant load must target register"
    	MOV	$0, 8(SP)			// ERROR "constant load must target register"
    	MOV	$1234, 0(SP)			// ERROR "constant load must target register"
    	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
    	MOVB	$1, X5				// ERROR "unsupported constant load"
    	MOVH	$1, X5				// ERROR "unsupported constant load"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Apr 01 04:17:57 GMT 2026
    - 27.2K bytes
    - Click Count (0)
  3. lib/fips140/v1.26.0.zip

    40(X10) MOV 48(X11), X20 MOV 48(X12), X21 MOV 56(X11), X22 MOV 56(X12), X23 XOR X20, X21 XOR X22, X23 MOV X21, 48(X10) MOV X23, 56(X10) ADD $64, X10 ADD $64, X11 ADD $64, X12 SUB $64, X13 BGE X13, X15, loop64 BEQZ X13, done tail32_check: MOV $32, X15 BLT X13, X15, tail16_check MOV 0(X11), X16 MOV 0(X12), X17 MOV 8(X11), X18 MOV 8(X12), X19 XOR X16, X17 XOR X18, X19 MOV X17, 0(X10) MOV X19, 8(X10) MOV 16(X11), X20 MOV 16(X12), X21 MOV 24(X11), X22 MOV 24(X12), X23 XOR X20, X21 XOR X22, X23 MOV X21, 16(X10)...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Jan 08 17:58:32 GMT 2026
    - 660.3K bytes
    - Click Count (0)
  4. doc/asm.html

    Instead, the compiler operates on a kind of semi-abstract instruction set,
    and instruction selection occurs partly after code generation.
    The assembler works on the semi-abstract form, so
    when you see an instruction like <code>MOV</code>
    what the toolchain actually generates for that operation might
    not be a move instruction at all, perhaps a clear or load.
    Or it might correspond exactly to the machine instruction with that name.
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Nov 14 19:09:46 GMT 2025
    - 36.5K bytes
    - Click Count (0)
  5. src/cmd/asm/internal/asm/testdata/arm64.s

    	VMOVQ	$0x8040201008040202, $0x7040201008040201, V20         // VMOVQ	$-9205322385119247870, $8088500183983456769, V20
    
    // mov(to/from sp)
    	MOVD	$0x1002(RSP), R1              // MOVD	$4098(RSP), R1              // e107409121080091
    	MOVD	$0x1708(RSP), RSP             // MOVD	$5896(RSP), RSP             // ff074091ff231c91
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Feb 27 20:41:17 GMT 2026
    - 96.2K bytes
    - Click Count (0)
  6. fess-crawler-lasta/src/main/resources/crawler/extractor.xml

    				"video/vnd.nokia.videovoip",
    				"video/vnd.objectvideo",
    				"video/vnd.sealed.mpeg1",
    				"video/vnd.sealed.mpeg4",
    				"video/vnd.sealed.swf",
    				"video/vnd.sealedmedia.softseal.mov",
    				"video/vnd.vivo",
    				"video/x-f4v",
    				"video/x-flc",
    				"video/x-fli",
    				"video/x-flv",
    				"video/x-jng",
    				"video/x-m4v",
    				"video/x-mng",
    				"video/x-ms-asf",
    Created: Sun Apr 12 03:50:13 GMT 2026
    - Last Modified: Wed Feb 11 01:15:55 GMT 2026
    - 50.4K bytes
    - Click Count (0)
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