if len(left) != len(right) {
			return false, nil
		}
		for i, l := range left {
			eq, err := l.compareOp(op, &right[i])
			if !eq || err != nil {
				return eq, err
			}
		}
		return true, nil
	case opIneq:
		for i, l := range left {
			eq, err := l.compareOp(op, &right[i])
			if eq || err != nil {
				return eq, err
			}
		}
		return false, nil
	default:

				}
				// {"acl": "public-read" } is an alternate way to indicate - [ "eq", "$acl", "public-read" ]
				// In this case we will just collapse this into "eq" for all use cases.
				parsedPolicy.Conditions.Policies = append(parsedPolicy.Conditions.Policies, struct {
					Operator string
					Key      string
					Value    string
				}{

  # Python 3.12 removed the module `imp` which is needed by gcloud CLI so we set
  # `CLOUDSDK_PYTHON` to Python 3.11 which is the system Python on TFCI Mac
  # VMs.
  pyenv install -s "3.11"
  if [[ $? -eq 0 ]]; then
    pyenv local "3.11"
    export CLOUDSDK_PYTHON=$(pyenv which python3.11)
  else
    echo "Python 3.11 not found, falling back to system python"
    export CLOUDSDK_PYTHON=$(which python3)
  fi

		}
	}
}

func BenchmarkEqual(b *testing.B) {
	b.Run("0", func(b *testing.B) {
		var buf [4]byte
		buf1 := buf[0:0]
		buf2 := buf[1:1]
		for i := 0; i < b.N; i++ {
			eq := Equal(buf1, buf2)
			if !eq {
				b.Fatal("bad equal")
			}
		}
	})

	sizes := []int{1, 6, 9, 15, 16, 20, 32, 4 << 10, 4 << 20, 64 << 20}

	b.Run("same", func(b *testing.B) {

	CSINV	CS, R1, R2, R3	// CSINV	HS, R1, R2, R3 // 232082da
	CSINV	HS, R1, R2, R3	// 232082da
	CSINVW	MI, R2, ZR, R2	// 42409f5a
	CINC	EQ, R4, R9	// 8914849a
	CINCW	PL, R2, ZR	// 5f44821a
	CINV	PL, R11, R22	// 76418bda
	CINVW	LS, R7, R13	// ed80875a
	CNEG	LS, R13, R7	// a7858dda
	CNEGW	EQ, R8, R13	// 0d15885a

// atomic ops
	LDARB	(R25), R2                            // 22ffdf08

CMP const0, const1 LDP.P 16(b_ptr), (acc0, acc1) CSEL EQ, acc0, x0, x0 CSEL EQ, acc1, x1, x1 LDP.P 16(b_ptr), (acc2, acc3) CSEL EQ, acc2, x2, x2 CSEL EQ, acc3, x3, x3 LDP.P 16(b_ptr), (acc4, acc5) CSEL EQ, acc4, y0, y0 CSEL EQ, acc5, y1, y1 LDP.P 16(b_ptr), (acc6, acc7) CSEL EQ, acc6, y2, y2 CSEL EQ, acc7, y3, y3 LDP.P 16(b_ptr), (acc0, acc1) CSEL EQ, acc0, t0, t0 CSEL EQ, acc1, t1, t1 LDP.P 16(b_ptr), (acc2, acc3) CSEL EQ, acc2, t2, t2 CSEL EQ, acc3, t3, t3 CMP $16, const1 BNE loop_select STP (x0,...

For the hardware register, use <code>R13</code>.
</p>

<p>
Condition code syntax is to append a period and the one- or two-letter code to the instruction,
as in <code>MOVW.EQ</code>.
Multiple codes may be appended: <code>MOVM.IA.W</code>.
The order of the code modifiers is irrelevant.
</p>

<p>
Addressing modes:
</p>

<ul>

<li>
<code>R0-&gt;16</code>